1 /**
2 ******************************************************************************
3 * @file stm32f4xx_fmpi2c.c
4 * @author MCD Application Team
5 * @version V1.5.1
6 * @date 22-May-2015
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Inter-Integrated circuit Fast Mode Plus (FMPI2C):
9 * + Initialization and Configuration
10 * + Communications handling
11 * + SMBUS management
12 * + FMPI2C registers management
13 * + Data transfers management
14 * + DMA transfers management
15 * + Interrupts and flags management
16 *
17 * @verbatim
18 ============================================================================
19 ##### How to use this driver #####
20 ============================================================================
21 [..]
22 (#) Enable peripheral clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2Cx, ENABLE)
23 function for FMPI2C peripheral.
24 (#) Enable SDA, SCL and SMBA (when used) GPIO clocks using
25 RCC_AHBPeriphClockCmd() function.
26 (#) Peripherals alternate function:
27 (++) Connect the pin to the desired peripherals' Alternate
28 Function (AF) using GPIO_PinAFConfig() function.
29 (++) Configure the desired pin in alternate function by:
30 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
31 (++) Select the type, OpenDrain and speed via
32 GPIO_PuPd, GPIO_OType and GPIO_Speed members
33 (++) Call GPIO_Init() function.
34 (#) Program the Mode, Timing , Own address, Ack and Acknowledged Address
35 using the FMPI2C_Init() function.
36 (#) Optionally you can enable/configure the following parameters without
37 re-initialization (i.e there is no need to call again FMPI2C_Init() function):
38 (++) Enable the acknowledge feature using FMPI2C_AcknowledgeConfig() function.
39 (++) Enable the dual addressing mode using FMPI2C_DualAddressCmd() function.
40 (++) Enable the general call using the FMPI2C_GeneralCallCmd() function.
41 (++) Enable the clock stretching using FMPI2C_StretchClockCmd() function.
42 (++) Enable the PEC Calculation using FMPI2C_CalculatePEC() function.
43 (++) For SMBus Mode:
44 (+++) Enable the SMBusAlert pin using FMPI2C_SMBusAlertCmd() function.
45 (#) Enable the NVIC and the corresponding interrupt using the function
46 FMPI2C_ITConfig() if you need to use interrupt mode.
47 (#) When using the DMA mode
48 (++) Configure the DMA using DMA_Init() function.
49 (++) Active the needed channel Request using FMPI2C_DMACmd() function.
50 (#) Enable the FMPI2C using the FMPI2C_Cmd() function.
51 (#) Enable the DMA using the DMA_Cmd() function when using DMA mode in the
52 transfers.
53 [..]
54 (@) When using FMPI2C in Fast Mode Plus, SCL and SDA pin 20mA current drive capability
55 must be enabled by setting the driving capability control bit in SYSCFG.
56
57 @endverbatim
58 ******************************************************************************
59 * @attention
60 *
61 * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
62 *
63 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
64 * You may not use this file except in compliance with the License.
65 * You may obtain a copy of the License at:
66 *
67 * http://www.st.com/software_license_agreement_liberty_v2
68 *
69 * Unless required by applicable law or agreed to in writing, software
70 * distributed under the License is distributed on an "AS IS" BASIS,
71 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
72 * See the License for the specific language governing permissions and
73 * limitations under the License.
74 *
75 ******************************************************************************
76 */
77
78 /* Includes ------------------------------------------------------------------*/
79 #include "stm32f4xx_fmpi2c.h"
80 #include "stm32f4xx_rcc.h"
81
82 /** @addtogroup STM32F4xx_StdPeriph_Driver
83 * @{
84 */
85
86 /** @defgroup FMPI2C
87 * @brief FMPI2C driver modules
88 * @{
89 */
90
91 #if defined(STM32F446xx)
92 /* Private typedef -----------------------------------------------------------*/
93 /* Private define ------------------------------------------------------------*/
94
95 #define CR1_CLEAR_MASK ((uint32_t)0x00CFE0FF) /*<! FMPI2C CR1 clear register Mask */
96 #define CR2_CLEAR_MASK ((uint32_t)0x07FF7FFF) /*<! FMPI2C CR2 clear register Mask */
97 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! FMPI2C TIMING clear register Mask */
98 #define ERROR_IT_MASK ((uint32_t)0x00003F00) /*<! FMPI2C Error interrupt register Mask */
99 #define TC_IT_MASK ((uint32_t)0x000000C0) /*<! FMPI2C TC interrupt register Mask */
100
101 /* Private macro -------------------------------------------------------------*/
102 /* Private variables ---------------------------------------------------------*/
103 /* Private function prototypes -----------------------------------------------*/
104 /* Private functions ---------------------------------------------------------*/
105
106 /** @defgroup FMPI2C_Private_Functions
107 * @{
108 */
109
110
111 /** @defgroup FMPI2C_Group1 Initialization and Configuration functions
112 * @brief Initialization and Configuration functions
113 *
114 @verbatim
115 ===============================================================================
116 ##### Initialization and Configuration functions #####
117 ===============================================================================
118 [..] This section provides a set of functions allowing to initialize the FMPI2C Mode,
119 FMPI2C Timing, FMPI2C filters, FMPI2C Addressing mode, FMPI2C OwnAddress1.
120
121 [..] The FMPI2C_Init() function follows the FMPI2C configuration procedures (these procedures
122 are available in reference manual).
123
124 [..] When the Software Reset is performed using FMPI2C_SoftwareResetCmd() function, the internal
125 states machines are reset and communication control bits, as well as status bits come
126 back to their reset value.
127
128 [..] Before enabling Stop mode using FMPI2C_StopModeCmd() FMPI2C Clock source must be set to
129 HSI and Digital filters must be disabled.
130
131 [..] Before enabling Own Address 2 via FMPI2C_DualAddressCmd() function, OA2 and mask should be
132 configured using FMPI2C_OwnAddress2Config() function.
133
134 [..] FMPI2C_SlaveByteControlCmd() enable Slave byte control that allow user to get control of
135 each byte in slave mode when NBYTES is set to 0x01.
136
137 @endverbatim
138 * @{
139 */
140
141 /**
142 * @brief Deinitializes the FMPI2Cx peripheral registers to their default reset values.
143 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
144 * @retval None
145 */
FMPI2C_DeInit(FMPI2C_TypeDef * FMPI2Cx)146 void FMPI2C_DeInit(FMPI2C_TypeDef* FMPI2Cx)
147 {
148 /* Check the parameters */
149 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
150
151 if (FMPI2Cx == FMPI2C1)
152 {
153 /* Enable FMPI2C1 reset state */
154 RCC_APB1PeriphResetCmd(RCC_APB1Periph_FMPI2C1, ENABLE);
155 /* Release FMPI2C1 from reset state */
156 RCC_APB1PeriphResetCmd(RCC_APB1Periph_FMPI2C1, DISABLE);
157 }
158 }
159
160 /**
161 * @brief Initializes the FMPI2Cx peripheral according to the specified
162 * parameters in the FMPI2C_InitStruct.
163 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
164 * @param FMPI2C_InitStruct: pointer to a FMPI2C_InitTypeDef structure that
165 * contains the configuration information for the specified FMPI2C peripheral.
166 * @retval None
167 */
FMPI2C_Init(FMPI2C_TypeDef * FMPI2Cx,FMPI2C_InitTypeDef * FMPI2C_InitStruct)168 void FMPI2C_Init(FMPI2C_TypeDef* FMPI2Cx, FMPI2C_InitTypeDef* FMPI2C_InitStruct)
169 {
170 uint32_t tmpreg = 0;
171
172 /* Check the parameters */
173 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
174 assert_param(IS_FMPI2C_ANALOG_FILTER(FMPI2C_InitStruct->FMPI2C_AnalogFilter));
175 assert_param(IS_FMPI2C_DIGITAL_FILTER(FMPI2C_InitStruct->FMPI2C_DigitalFilter));
176 assert_param(IS_FMPI2C_MODE(FMPI2C_InitStruct->FMPI2C_Mode));
177 assert_param(IS_FMPI2C_OWN_ADDRESS1(FMPI2C_InitStruct->FMPI2C_OwnAddress1));
178 assert_param(IS_FMPI2C_ACK(FMPI2C_InitStruct->FMPI2C_Ack));
179 assert_param(IS_FMPI2C_ACKNOWLEDGE_ADDRESS(FMPI2C_InitStruct->FMPI2C_AcknowledgedAddress));
180
181 /* Disable FMPI2Cx Peripheral */
182 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_CR1_PE);
183
184 /*---------------------------- FMPI2Cx FILTERS Configuration ------------------*/
185 /* Get the FMPI2Cx CR1 value */
186 tmpreg = FMPI2Cx->CR1;
187 /* Clear FMPI2Cx CR1 register */
188 tmpreg &= CR1_CLEAR_MASK;
189 /* Configure FMPI2Cx: analog and digital filter */
190 /* Set ANFOFF bit according to FMPI2C_AnalogFilter value */
191 /* Set DFN bits according to FMPI2C_DigitalFilter value */
192 tmpreg |= (uint32_t)FMPI2C_InitStruct->FMPI2C_AnalogFilter |(FMPI2C_InitStruct->FMPI2C_DigitalFilter << 8);
193
194 /* Write to FMPI2Cx CR1 */
195 FMPI2Cx->CR1 = tmpreg;
196
197 /*---------------------------- FMPI2Cx TIMING Configuration -------------------*/
198 /* Configure FMPI2Cx: Timing */
199 /* Set TIMINGR bits according to FMPI2C_Timing */
200 /* Write to FMPI2Cx TIMING */
201 FMPI2Cx->TIMINGR = FMPI2C_InitStruct->FMPI2C_Timing & TIMING_CLEAR_MASK;
202
203 /* Enable FMPI2Cx Peripheral */
204 FMPI2Cx->CR1 |= FMPI2C_CR1_PE;
205
206 /*---------------------------- FMPI2Cx OAR1 Configuration ---------------------*/
207 /* Clear tmpreg local variable */
208 tmpreg = 0;
209 /* Clear OAR1 register */
210 FMPI2Cx->OAR1 = (uint32_t)tmpreg;
211 /* Clear OAR2 register */
212 FMPI2Cx->OAR2 = (uint32_t)tmpreg;
213 /* Configure FMPI2Cx: Own Address1 and acknowledged address */
214 /* Set OA1MODE bit according to FMPI2C_AcknowledgedAddress value */
215 /* Set OA1 bits according to FMPI2C_OwnAddress1 value */
216 tmpreg = (uint32_t)((uint32_t)FMPI2C_InitStruct->FMPI2C_AcknowledgedAddress | \
217 (uint32_t)FMPI2C_InitStruct->FMPI2C_OwnAddress1);
218 /* Write to FMPI2Cx OAR1 */
219 FMPI2Cx->OAR1 = tmpreg;
220 /* Enable Own Address1 acknowledgement */
221 FMPI2Cx->OAR1 |= FMPI2C_OAR1_OA1EN;
222
223 /*---------------------------- FMPI2Cx MODE Configuration ---------------------*/
224 /* Configure FMPI2Cx: mode */
225 /* Set SMBDEN and SMBHEN bits according to FMPI2C_Mode value */
226 tmpreg = FMPI2C_InitStruct->FMPI2C_Mode;
227 /* Write to FMPI2Cx CR1 */
228 FMPI2Cx->CR1 |= tmpreg;
229
230 /*---------------------------- FMPI2Cx ACK Configuration ----------------------*/
231 /* Get the FMPI2Cx CR2 value */
232 tmpreg = FMPI2Cx->CR2;
233 /* Clear FMPI2Cx CR2 register */
234 tmpreg &= CR2_CLEAR_MASK;
235 /* Configure FMPI2Cx: acknowledgement */
236 /* Set NACK bit according to FMPI2C_Ack value */
237 tmpreg |= FMPI2C_InitStruct->FMPI2C_Ack;
238 /* Write to FMPI2Cx CR2 */
239 FMPI2Cx->CR2 = tmpreg;
240 }
241
242 /**
243 * @brief Fills each FMPI2C_InitStruct member with its default value.
244 * @param FMPI2C_InitStruct: pointer to an FMPI2C_InitTypeDef structure which will be initialized.
245 * @retval None
246 */
FMPI2C_StructInit(FMPI2C_InitTypeDef * FMPI2C_InitStruct)247 void FMPI2C_StructInit(FMPI2C_InitTypeDef* FMPI2C_InitStruct)
248 {
249 /*---------------- Reset FMPI2C init structure parameters values --------------*/
250 /* Initialize the FMPI2C_Timing member */
251 FMPI2C_InitStruct->FMPI2C_Timing = 0;
252 /* Initialize the FMPI2C_AnalogFilter member */
253 FMPI2C_InitStruct->FMPI2C_AnalogFilter = FMPI2C_AnalogFilter_Enable;
254 /* Initialize the FMPI2C_DigitalFilter member */
255 FMPI2C_InitStruct->FMPI2C_DigitalFilter = 0;
256 /* Initialize the FMPI2C_Mode member */
257 FMPI2C_InitStruct->FMPI2C_Mode = FMPI2C_Mode_FMPI2C;
258 /* Initialize the FMPI2C_OwnAddress1 member */
259 FMPI2C_InitStruct->FMPI2C_OwnAddress1 = 0;
260 /* Initialize the FMPI2C_Ack member */
261 FMPI2C_InitStruct->FMPI2C_Ack = FMPI2C_Ack_Disable;
262 /* Initialize the FMPI2C_AcknowledgedAddress member */
263 FMPI2C_InitStruct->FMPI2C_AcknowledgedAddress = FMPI2C_AcknowledgedAddress_7bit;
264 }
265
266 /**
267 * @brief Enables or disables the specified FMPI2C peripheral.
268 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
269 * @param NewState: new state of the FMPI2Cx peripheral.
270 * This parameter can be: ENABLE or DISABLE.
271 * @retval None
272 */
FMPI2C_Cmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)273 void FMPI2C_Cmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
274 {
275 /* Check the parameters */
276 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
277 assert_param(IS_FUNCTIONAL_STATE(NewState));
278 if (NewState != DISABLE)
279 {
280 /* Enable the selected FMPI2C peripheral */
281 FMPI2Cx->CR1 |= FMPI2C_CR1_PE;
282 }
283 else
284 {
285 /* Disable the selected FMPI2C peripheral */
286 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_CR1_PE);
287 }
288 }
289
290
291 /**
292 * @brief Enables or disables the specified FMPI2C software reset.
293 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
294 * @retval None
295 */
FMPI2C_SoftwareResetCmd(FMPI2C_TypeDef * FMPI2Cx)296 void FMPI2C_SoftwareResetCmd(FMPI2C_TypeDef* FMPI2Cx)
297 {
298 /* Check the parameters */
299 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
300
301 /* Disable peripheral */
302 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_CR1_PE);
303
304 /* Perform a dummy read to delay the disable of peripheral for minimum
305 3 APB clock cycles to perform the software reset functionality */
306 *(__IO uint32_t *)(uint32_t)FMPI2Cx;
307
308 /* Enable peripheral */
309 FMPI2Cx->CR1 |= FMPI2C_CR1_PE;
310 }
311
312 /**
313 * @brief Enables or disables the specified FMPI2C interrupts.
314 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
315 * @param FMPI2C_IT: specifies the FMPI2C interrupts sources to be enabled or disabled.
316 * This parameter can be any combination of the following values:
317 * @arg FMPI2C_IT_ERRI: Error interrupt mask
318 * @arg FMPI2C_IT_TCI: Transfer Complete interrupt mask
319 * @arg FMPI2C_IT_STOPI: Stop Detection interrupt mask
320 * @arg FMPI2C_IT_NACKI: Not Acknowledge received interrupt mask
321 * @arg FMPI2C_IT_ADDRI: Address Match interrupt mask
322 * @arg FMPI2C_IT_RXI: RX interrupt mask
323 * @arg FMPI2C_IT_TXI: TX interrupt mask
324 * @param NewState: new state of the specified FMPI2C interrupts.
325 * This parameter can be: ENABLE or DISABLE.
326 * @retval None
327 */
FMPI2C_ITConfig(FMPI2C_TypeDef * FMPI2Cx,uint32_t FMPI2C_IT,FunctionalState NewState)328 void FMPI2C_ITConfig(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT, FunctionalState NewState)
329 {
330 /* Check the parameters */
331 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
332 assert_param(IS_FUNCTIONAL_STATE(NewState));
333 assert_param(IS_FMPI2C_CONFIG_IT(FMPI2C_IT));
334
335 if (NewState != DISABLE)
336 {
337 /* Enable the selected FMPI2C interrupts */
338 FMPI2Cx->CR1 |= FMPI2C_IT;
339 }
340 else
341 {
342 /* Disable the selected FMPI2C interrupts */
343 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_IT);
344 }
345 }
346
347 /**
348 * @brief Enables or disables the FMPI2C Clock stretching.
349 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
350 * @param NewState: new state of the FMPI2Cx Clock stretching.
351 * This parameter can be: ENABLE or DISABLE.
352 * @retval None
353 */
FMPI2C_StretchClockCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)354 void FMPI2C_StretchClockCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
355 {
356 /* Check the parameters */
357 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
358 assert_param(IS_FUNCTIONAL_STATE(NewState));
359
360 if (NewState != DISABLE)
361 {
362 /* Enable clock stretching */
363 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_CR1_NOSTRETCH);
364 }
365 else
366 {
367 /* Disable clock stretching */
368 FMPI2Cx->CR1 |= FMPI2C_CR1_NOSTRETCH;
369 }
370 }
371
372 /**
373 * @brief Enables or disables FMPI2Cp from stop mode.
374 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
375 * @param NewState: new state of the FMPI2Cx stop mode.
376 * This parameter can be: ENABLE or DISABLE.
377 * @retval None
378 */
FMPI2C_StopModeCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)379 void FMPI2C_StopModeCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
380 {
381 /* Check the parameters */
382 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
383 assert_param(IS_FUNCTIONAL_STATE(NewState));
384
385 if (NewState != DISABLE)
386 {
387 /* Enable wakeup from stop mode */
388 FMPI2Cx->CR1 |= FMPI2C_CR1_WUPEN;
389 }
390 else
391 {
392 /* Disable wakeup from stop mode */
393 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_CR1_WUPEN);
394 }
395 }
396
397 /**
398 * @brief Enables or disables the FMPI2C own address 2.
399 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
400 * @param NewState: new state of the FMPI2C own address 2.
401 * This parameter can be: ENABLE or DISABLE.
402 * @retval None
403 */
FMPI2C_DualAddressCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)404 void FMPI2C_DualAddressCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
405 {
406 /* Check the parameters */
407 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
408 assert_param(IS_FUNCTIONAL_STATE(NewState));
409
410 if (NewState != DISABLE)
411 {
412 /* Enable own address 2 */
413 FMPI2Cx->OAR2 |= FMPI2C_OAR2_OA2EN;
414 }
415 else
416 {
417 /* Disable own address 2 */
418 FMPI2Cx->OAR2 &= (uint32_t)~((uint32_t)FMPI2C_OAR2_OA2EN);
419 }
420 }
421
422 /**
423 * @brief Configures the FMPI2C slave own address 2 and mask.
424 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
425 * @param Address: specifies the slave address to be programmed.
426 * @param Mask: specifies own address 2 mask to be programmed.
427 * This parameter can be one of the following values:
428 * @arg FMPI2C_OA2_NoMask: no mask.
429 * @arg FMPI2C_OA2_Mask01: OA2[1] is masked and don't care.
430 * @arg FMPI2C_OA2_Mask02: OA2[2:1] are masked and don't care.
431 * @arg FMPI2C_OA2_Mask03: OA2[3:1] are masked and don't care.
432 * @arg FMPI2C_OA2_Mask04: OA2[4:1] are masked and don't care.
433 * @arg FMPI2C_OA2_Mask05: OA2[5:1] are masked and don't care.
434 * @arg FMPI2C_OA2_Mask06: OA2[6:1] are masked and don't care.
435 * @arg FMPI2C_OA2_Mask07: OA2[7:1] are masked and don't care.
436 * @retval None
437 */
FMPI2C_OwnAddress2Config(FMPI2C_TypeDef * FMPI2Cx,uint16_t Address,uint8_t Mask)438 void FMPI2C_OwnAddress2Config(FMPI2C_TypeDef* FMPI2Cx, uint16_t Address, uint8_t Mask)
439 {
440 uint32_t tmpreg = 0;
441
442 /* Check the parameters */
443 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
444 assert_param(IS_FMPI2C_OWN_ADDRESS2(Address));
445 assert_param(IS_FMPI2C_OWN_ADDRESS2_MASK(Mask));
446
447 /* Get the old register value */
448 tmpreg = FMPI2Cx->OAR2;
449
450 /* Reset FMPI2Cx OA2 bit [7:1] and OA2MSK bit [1:0] */
451 tmpreg &= (uint32_t)~((uint32_t)(FMPI2C_OAR2_OA2 | FMPI2C_OAR2_OA2MSK));
452
453 /* Set FMPI2Cx SADD */
454 tmpreg |= (uint32_t)(((uint32_t)Address & FMPI2C_OAR2_OA2) | \
455 (((uint32_t)Mask << 8) & FMPI2C_OAR2_OA2MSK)) ;
456
457 /* Store the new register value */
458 FMPI2Cx->OAR2 = tmpreg;
459 }
460
461 /**
462 * @brief Enables or disables the FMPI2C general call mode.
463 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
464 * @param NewState: new state of the FMPI2C general call mode.
465 * This parameter can be: ENABLE or DISABLE.
466 * @retval None
467 */
FMPI2C_GeneralCallCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)468 void FMPI2C_GeneralCallCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
469 {
470 /* Check the parameters */
471 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
472 assert_param(IS_FUNCTIONAL_STATE(NewState));
473
474 if (NewState != DISABLE)
475 {
476 /* Enable general call mode */
477 FMPI2Cx->CR1 |= FMPI2C_CR1_GCEN;
478 }
479 else
480 {
481 /* Disable general call mode */
482 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_CR1_GCEN);
483 }
484 }
485
486 /**
487 * @brief Enables or disables the FMPI2C slave byte control.
488 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
489 * @param NewState: new state of the FMPI2C slave byte control.
490 * This parameter can be: ENABLE or DISABLE.
491 * @retval None
492 */
FMPI2C_SlaveByteControlCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)493 void FMPI2C_SlaveByteControlCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
494 {
495 /* Check the parameters */
496 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
497 assert_param(IS_FUNCTIONAL_STATE(NewState));
498
499 if (NewState != DISABLE)
500 {
501 /* Enable slave byte control */
502 FMPI2Cx->CR1 |= FMPI2C_CR1_SBC;
503 }
504 else
505 {
506 /* Disable slave byte control */
507 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_CR1_SBC);
508 }
509 }
510
511 /**
512 * @brief Configures the slave address to be transmitted after start generation.
513 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
514 * @param Address: specifies the slave address to be programmed.
515 * @note This function should be called before generating start condition.
516 * @retval None
517 */
FMPI2C_SlaveAddressConfig(FMPI2C_TypeDef * FMPI2Cx,uint16_t Address)518 void FMPI2C_SlaveAddressConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t Address)
519 {
520 uint32_t tmpreg = 0;
521
522 /* Check the parameters */
523 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
524 assert_param(IS_FMPI2C_SLAVE_ADDRESS(Address));
525
526 /* Get the old register value */
527 tmpreg = FMPI2Cx->CR2;
528
529 /* Reset FMPI2Cx SADD bit [9:0] */
530 tmpreg &= (uint32_t)~((uint32_t)FMPI2C_CR2_SADD);
531
532 /* Set FMPI2Cx SADD */
533 tmpreg |= (uint32_t)((uint32_t)Address & FMPI2C_CR2_SADD);
534
535 /* Store the new register value */
536 FMPI2Cx->CR2 = tmpreg;
537 }
538
539 /**
540 * @brief Enables or disables the FMPI2C 10-bit addressing mode for the master.
541 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
542 * @param NewState: new state of the FMPI2C 10-bit addressing mode.
543 * This parameter can be: ENABLE or DISABLE.
544 * @note This function should be called before generating start condition.
545 * @retval None
546 */
FMPI2C_10BitAddressingModeCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)547 void FMPI2C_10BitAddressingModeCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
548 {
549 /* Check the parameters */
550 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
551 assert_param(IS_FUNCTIONAL_STATE(NewState));
552
553 if (NewState != DISABLE)
554 {
555 /* Enable 10-bit addressing mode */
556 FMPI2Cx->CR2 |= FMPI2C_CR2_ADD10;
557 }
558 else
559 {
560 /* Disable 10-bit addressing mode */
561 FMPI2Cx->CR2 &= (uint32_t)~((uint32_t)FMPI2C_CR2_ADD10);
562 }
563 }
564
565 /**
566 * @}
567 */
568
569
570 /** @defgroup FMPI2C_Group2 Communications handling functions
571 * @brief Communications handling functions
572 *
573 @verbatim
574 ===============================================================================
575 ##### Communications handling functions #####
576 ===============================================================================
577 [..] This section provides a set of functions that handles FMPI2C communication.
578
579 [..] Automatic End mode is enabled using FMPI2C_AutoEndCmd() function. When Reload
580 mode is enabled via FMPI2C_ReloadCmd() AutoEnd bit has no effect.
581
582 [..] FMPI2C_NumberOfBytesConfig() function set the number of bytes to be transferred,
583 this configuration should be done before generating start condition in master
584 mode.
585
586 [..] When switching from master write operation to read operation in 10Bit addressing
587 mode, master can only sends the 1st 7 bits of the 10 bit address, followed by
588 Read direction by enabling HEADR bit using FMPI2C_10BitAddressHeader() function.
589
590 [..] In master mode, when transferring more than 255 bytes Reload mode should be used
591 to handle communication. In the first phase of transfer, Nbytes should be set to
592 255. After transferring these bytes TCR flag is set and FMPI2C_TransferHandling()
593 function should be called to handle remaining communication.
594
595 [..] In master mode, when software end mode is selected when all data is transferred
596 TC flag is set FMPI2C_TransferHandling() function should be called to generate STOP
597 or generate ReStart.
598
599 @endverbatim
600 * @{
601 */
602
603 /**
604 * @brief Enables or disables the FMPI2C automatic end mode (stop condition is
605 * automatically sent when nbytes data are transferred).
606 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
607 * @param NewState: new state of the FMPI2C automatic end mode.
608 * This parameter can be: ENABLE or DISABLE.
609 * @note This function has effect if Reload mode is disabled.
610 * @retval None
611 */
FMPI2C_AutoEndCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)612 void FMPI2C_AutoEndCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
613 {
614 /* Check the parameters */
615 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
616 assert_param(IS_FUNCTIONAL_STATE(NewState));
617
618 if (NewState != DISABLE)
619 {
620 /* Enable Auto end mode */
621 FMPI2Cx->CR2 |= FMPI2C_CR2_AUTOEND;
622 }
623 else
624 {
625 /* Disable Auto end mode */
626 FMPI2Cx->CR2 &= (uint32_t)~((uint32_t)FMPI2C_CR2_AUTOEND);
627 }
628 }
629
630 /**
631 * @brief Enables or disables the FMPI2C nbytes reload mode.
632 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
633 * @param NewState: new state of the nbytes reload mode.
634 * This parameter can be: ENABLE or DISABLE.
635 * @retval None
636 */
FMPI2C_ReloadCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)637 void FMPI2C_ReloadCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
638 {
639 /* Check the parameters */
640 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
641 assert_param(IS_FUNCTIONAL_STATE(NewState));
642
643 if (NewState != DISABLE)
644 {
645 /* Enable Auto Reload mode */
646 FMPI2Cx->CR2 |= FMPI2C_CR2_RELOAD;
647 }
648 else
649 {
650 /* Disable Auto Reload mode */
651 FMPI2Cx->CR2 &= (uint32_t)~((uint32_t)FMPI2C_CR2_RELOAD);
652 }
653 }
654
655 /**
656 * @brief Configures the number of bytes to be transmitted/received.
657 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
658 * @param Number_Bytes: specifies the number of bytes to be programmed.
659 * @retval None
660 */
FMPI2C_NumberOfBytesConfig(FMPI2C_TypeDef * FMPI2Cx,uint8_t Number_Bytes)661 void FMPI2C_NumberOfBytesConfig(FMPI2C_TypeDef* FMPI2Cx, uint8_t Number_Bytes)
662 {
663 uint32_t tmpreg = 0;
664
665 /* Check the parameters */
666 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
667
668 /* Get the old register value */
669 tmpreg = FMPI2Cx->CR2;
670
671 /* Reset FMPI2Cx Nbytes bit [7:0] */
672 tmpreg &= (uint32_t)~((uint32_t)FMPI2C_CR2_NBYTES);
673
674 /* Set FMPI2Cx Nbytes */
675 tmpreg |= (uint32_t)(((uint32_t)Number_Bytes << 16 ) & FMPI2C_CR2_NBYTES);
676
677 /* Store the new register value */
678 FMPI2Cx->CR2 = tmpreg;
679 }
680
681 /**
682 * @brief Configures the type of transfer request for the master.
683 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
684 * @param FMPI2C_Direction: specifies the transfer request direction to be programmed.
685 * This parameter can be one of the following values:
686 * @arg FMPI2C_Direction_Transmitter: Master request a write transfer
687 * @arg FMPI2C_Direction_Receiver: Master request a read transfer
688 * @retval None
689 */
FMPI2C_MasterRequestConfig(FMPI2C_TypeDef * FMPI2Cx,uint16_t FMPI2C_Direction)690 void FMPI2C_MasterRequestConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t FMPI2C_Direction)
691 {
692 /* Check the parameters */
693 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
694 assert_param(IS_FMPI2C_DIRECTION(FMPI2C_Direction));
695
696 /* Test on the direction to set/reset the read/write bit */
697 if (FMPI2C_Direction == FMPI2C_Direction_Transmitter)
698 {
699 /* Request a write Transfer */
700 FMPI2Cx->CR2 &= (uint32_t)~((uint32_t)FMPI2C_CR2_RD_WRN);
701 }
702 else
703 {
704 /* Request a read Transfer */
705 FMPI2Cx->CR2 |= FMPI2C_CR2_RD_WRN;
706 }
707 }
708
709 /**
710 * @brief Generates FMPI2Cx communication START condition.
711 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
712 * @param NewState: new state of the FMPI2C START condition generation.
713 * This parameter can be: ENABLE or DISABLE.
714 * @retval None
715 */
FMPI2C_GenerateSTART(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)716 void FMPI2C_GenerateSTART(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
717 {
718 /* Check the parameters */
719 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
720 assert_param(IS_FUNCTIONAL_STATE(NewState));
721
722 if (NewState != DISABLE)
723 {
724 /* Generate a START condition */
725 FMPI2Cx->CR2 |= FMPI2C_CR2_START;
726 }
727 else
728 {
729 /* Disable the START condition generation */
730 FMPI2Cx->CR2 &= (uint32_t)~((uint32_t)FMPI2C_CR2_START);
731 }
732 }
733
734 /**
735 * @brief Generates FMPI2Cx communication STOP condition.
736 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
737 * @param NewState: new state of the FMPI2C STOP condition generation.
738 * This parameter can be: ENABLE or DISABLE.
739 * @retval None
740 */
FMPI2C_GenerateSTOP(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)741 void FMPI2C_GenerateSTOP(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
742 {
743 /* Check the parameters */
744 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
745 assert_param(IS_FUNCTIONAL_STATE(NewState));
746
747 if (NewState != DISABLE)
748 {
749 /* Generate a STOP condition */
750 FMPI2Cx->CR2 |= FMPI2C_CR2_STOP;
751 }
752 else
753 {
754 /* Disable the STOP condition generation */
755 FMPI2Cx->CR2 &= (uint32_t)~((uint32_t)FMPI2C_CR2_STOP);
756 }
757 }
758
759 /**
760 * @brief Enables or disables the FMPI2C 10-bit header only mode with read direction.
761 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
762 * @param NewState: new state of the FMPI2C 10-bit header only mode.
763 * This parameter can be: ENABLE or DISABLE.
764 * @note This mode can be used only when switching from master transmitter mode
765 * to master receiver mode.
766 * @retval None
767 */
FMPI2C_10BitAddressHeaderCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)768 void FMPI2C_10BitAddressHeaderCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
769 {
770 /* Check the parameters */
771 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
772 assert_param(IS_FUNCTIONAL_STATE(NewState));
773
774 if (NewState != DISABLE)
775 {
776 /* Enable 10-bit header only mode */
777 FMPI2Cx->CR2 |= FMPI2C_CR2_HEAD10R;
778 }
779 else
780 {
781 /* Disable 10-bit header only mode */
782 FMPI2Cx->CR2 &= (uint32_t)~((uint32_t)FMPI2C_CR2_HEAD10R);
783 }
784 }
785
786 /**
787 * @brief Generates FMPI2C communication Acknowledge.
788 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
789 * @param NewState: new state of the Acknowledge.
790 * This parameter can be: ENABLE or DISABLE.
791 * @retval None
792 */
FMPI2C_AcknowledgeConfig(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)793 void FMPI2C_AcknowledgeConfig(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
794 {
795 /* Check the parameters */
796 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
797 assert_param(IS_FUNCTIONAL_STATE(NewState));
798
799 if (NewState != DISABLE)
800 {
801 /* Enable ACK generation */
802 FMPI2Cx->CR2 &= (uint32_t)~((uint32_t)FMPI2C_CR2_NACK);
803 }
804 else
805 {
806 /* Enable NACK generation */
807 FMPI2Cx->CR2 |= FMPI2C_CR2_NACK;
808 }
809 }
810
811 /**
812 * @brief Returns the FMPI2C slave matched address .
813 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
814 * @retval The value of the slave matched address .
815 */
FMPI2C_GetAddressMatched(FMPI2C_TypeDef * FMPI2Cx)816 uint8_t FMPI2C_GetAddressMatched(FMPI2C_TypeDef* FMPI2Cx)
817 {
818 /* Check the parameters */
819 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
820
821 /* Return the slave matched address in the SR1 register */
822 return (uint8_t)(((uint32_t)FMPI2Cx->ISR & FMPI2C_ISR_ADDCODE) >> 16) ;
823 }
824
825 /**
826 * @brief Returns the FMPI2C slave received request.
827 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
828 * @retval The value of the received request.
829 */
FMPI2C_GetTransferDirection(FMPI2C_TypeDef * FMPI2Cx)830 uint16_t FMPI2C_GetTransferDirection(FMPI2C_TypeDef* FMPI2Cx)
831 {
832 uint32_t tmpreg = 0;
833 uint16_t direction = 0;
834
835 /* Check the parameters */
836 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
837
838 /* Return the slave matched address in the SR1 register */
839 tmpreg = (uint32_t)(FMPI2Cx->ISR & FMPI2C_ISR_DIR);
840
841 /* If write transfer is requested */
842 if (tmpreg == 0)
843 {
844 /* write transfer is requested */
845 direction = FMPI2C_Direction_Transmitter;
846 }
847 else
848 {
849 /* Read transfer is requested */
850 direction = FMPI2C_Direction_Receiver;
851 }
852 return direction;
853 }
854
855 /**
856 * @brief Handles FMPI2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
857 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
858 * @param Address: specifies the slave address to be programmed.
859 * @param Number_Bytes: specifies the number of bytes to be programmed.
860 * This parameter must be a value between 0 and 255.
861 * @param ReloadEndMode: new state of the FMPI2C START condition generation.
862 * This parameter can be one of the following values:
863 * @arg FMPI2C_Reload_Mode: Enable Reload mode .
864 * @arg FMPI2C_AutoEnd_Mode: Enable Automatic end mode.
865 * @arg FMPI2C_SoftEnd_Mode: Enable Software end mode.
866 * @param StartStopMode: new state of the FMPI2C START condition generation.
867 * This parameter can be one of the following values:
868 * @arg FMPI2C_No_StartStop: Don't Generate stop and start condition.
869 * @arg FMPI2C_Generate_Stop: Generate stop condition (Number_Bytes should be set to 0).
870 * @arg FMPI2C_Generate_Start_Read: Generate Restart for read request.
871 * @arg FMPI2C_Generate_Start_Write: Generate Restart for write request.
872 * @retval None
873 */
FMPI2C_TransferHandling(FMPI2C_TypeDef * FMPI2Cx,uint16_t Address,uint8_t Number_Bytes,uint32_t ReloadEndMode,uint32_t StartStopMode)874 void FMPI2C_TransferHandling(FMPI2C_TypeDef* FMPI2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode)
875 {
876 uint32_t tmpreg = 0;
877
878 /* Check the parameters */
879 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
880 assert_param(IS_FMPI2C_SLAVE_ADDRESS(Address));
881 assert_param(IS_RELOAD_END_MODE(ReloadEndMode));
882 assert_param(IS_START_STOP_MODE(StartStopMode));
883
884 /* Get the CR2 register value */
885 tmpreg = FMPI2Cx->CR2;
886
887 /* clear tmpreg specific bits */
888 tmpreg &= (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | FMPI2C_CR2_AUTOEND | FMPI2C_CR2_RD_WRN | FMPI2C_CR2_START | FMPI2C_CR2_STOP));
889
890 /* update tmpreg */
891 tmpreg |= (uint32_t)(((uint32_t)Address & FMPI2C_CR2_SADD) | (((uint32_t)Number_Bytes << 16 ) & FMPI2C_CR2_NBYTES) | \
892 (uint32_t)ReloadEndMode | (uint32_t)StartStopMode);
893
894 /* update CR2 register */
895 FMPI2Cx->CR2 = tmpreg;
896 }
897
898 /**
899 * @}
900 */
901
902
903 /** @defgroup FMPI2C_Group3 SMBUS management functions
904 * @brief SMBUS management functions
905 *
906 @verbatim
907 ===============================================================================
908 ##### SMBUS management functions #####
909 ===============================================================================
910 [..] This section provides a set of functions that handles SMBus communication
911 and timeouts detection.
912
913 [..] The SMBus Device default address (0b1100 001) is enabled by calling FMPI2C_Init()
914 function and setting FMPI2C_Mode member of FMPI2C_InitTypeDef() structure to
915 FMPI2C_Mode_SMBusDevice.
916
917 [..] The SMBus Host address (0b0001 000) is enabled by calling FMPI2C_Init()
918 function and setting FMPI2C_Mode member of FMPI2C_InitTypeDef() structure to
919 FMPI2C_Mode_SMBusHost.
920
921 [..] The Alert Response Address (0b0001 100) is enabled using FMPI2C_SMBusAlertCmd()
922 function.
923
924 [..] To detect cumulative SCL stretch in master and slave mode, TIMEOUTB should be
925 configured (in accordance to SMBus specification) using FMPI2C_TimeoutBConfig()
926 function then FMPI2C_ExtendedClockTimeoutCmd() function should be called to enable
927 the detection.
928
929 [..] SCL low timeout is detected by configuring TIMEOUTB using FMPI2C_TimeoutBConfig()
930 function followed by the call of FMPI2C_ClockTimeoutCmd(). When adding to this
931 procedure the call of FMPI2C_IdleClockTimeoutCmd() function, Bus Idle condition
932 (both SCL and SDA high) is detected also.
933
934 @endverbatim
935 * @{
936 */
937
938 /**
939 * @brief Enables or disables FMPI2C SMBus alert.
940 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
941 * @param NewState: new state of the FMPI2Cx SMBus alert.
942 * This parameter can be: ENABLE or DISABLE.
943 * @retval None
944 */
FMPI2C_SMBusAlertCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)945 void FMPI2C_SMBusAlertCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
946 {
947 /* Check the parameters */
948 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
949 assert_param(IS_FUNCTIONAL_STATE(NewState));
950
951 if (NewState != DISABLE)
952 {
953 /* Enable SMBus alert */
954 FMPI2Cx->CR1 |= FMPI2C_CR1_ALERTEN;
955 }
956 else
957 {
958 /* Disable SMBus alert */
959 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_CR1_ALERTEN);
960 }
961 }
962
963 /**
964 * @brief Enables or disables FMPI2C Clock Timeout (SCL Timeout detection).
965 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
966 * @param NewState: new state of the FMPI2Cx clock Timeout.
967 * This parameter can be: ENABLE or DISABLE.
968 * @retval None
969 */
FMPI2C_ClockTimeoutCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)970 void FMPI2C_ClockTimeoutCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
971 {
972 /* Check the parameters */
973 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
974 assert_param(IS_FUNCTIONAL_STATE(NewState));
975
976 if (NewState != DISABLE)
977 {
978 /* Enable Clock Timeout */
979 FMPI2Cx->TIMEOUTR |= FMPI2C_TIMEOUTR_TIMOUTEN;
980 }
981 else
982 {
983 /* Disable Clock Timeout */
984 FMPI2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)FMPI2C_TIMEOUTR_TIMOUTEN);
985 }
986 }
987
988 /**
989 * @brief Enables or disables FMPI2C Extended Clock Timeout (SCL cumulative Timeout detection).
990 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
991 * @param NewState: new state of the FMPI2Cx Extended clock Timeout.
992 * This parameter can be: ENABLE or DISABLE.
993 * @retval None
994 */
FMPI2C_ExtendedClockTimeoutCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)995 void FMPI2C_ExtendedClockTimeoutCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
996 {
997 /* Check the parameters */
998 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
999 assert_param(IS_FUNCTIONAL_STATE(NewState));
1000
1001 if (NewState != DISABLE)
1002 {
1003 /* Enable Clock Timeout */
1004 FMPI2Cx->TIMEOUTR |= FMPI2C_TIMEOUTR_TEXTEN;
1005 }
1006 else
1007 {
1008 /* Disable Clock Timeout */
1009 FMPI2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)FMPI2C_TIMEOUTR_TEXTEN);
1010 }
1011 }
1012
1013 /**
1014 * @brief Enables or disables FMPI2C Idle Clock Timeout (Bus idle SCL and SDA
1015 * high detection).
1016 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1017 * @param NewState: new state of the FMPI2Cx Idle clock Timeout.
1018 * This parameter can be: ENABLE or DISABLE.
1019 * @retval None
1020 */
FMPI2C_IdleClockTimeoutCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)1021 void FMPI2C_IdleClockTimeoutCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
1022 {
1023 /* Check the parameters */
1024 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1025 assert_param(IS_FUNCTIONAL_STATE(NewState));
1026
1027 if (NewState != DISABLE)
1028 {
1029 /* Enable Clock Timeout */
1030 FMPI2Cx->TIMEOUTR |= FMPI2C_TIMEOUTR_TIDLE;
1031 }
1032 else
1033 {
1034 /* Disable Clock Timeout */
1035 FMPI2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)FMPI2C_TIMEOUTR_TIDLE);
1036 }
1037 }
1038
1039 /**
1040 * @brief Configures the FMPI2C Bus Timeout A (SCL Timeout when TIDLE = 0 or Bus
1041 * idle SCL and SDA high when TIDLE = 1).
1042 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1043 * @param Timeout: specifies the TimeoutA to be programmed.
1044 * @retval None
1045 */
FMPI2C_TimeoutAConfig(FMPI2C_TypeDef * FMPI2Cx,uint16_t Timeout)1046 void FMPI2C_TimeoutAConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t Timeout)
1047 {
1048 uint32_t tmpreg = 0;
1049
1050 /* Check the parameters */
1051 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1052 assert_param(IS_FMPI2C_TIMEOUT(Timeout));
1053
1054 /* Get the old register value */
1055 tmpreg = FMPI2Cx->TIMEOUTR;
1056
1057 /* Reset FMPI2Cx TIMEOUTA bit [11:0] */
1058 tmpreg &= (uint32_t)~((uint32_t)FMPI2C_TIMEOUTR_TIMEOUTA);
1059
1060 /* Set FMPI2Cx TIMEOUTA */
1061 tmpreg |= (uint32_t)((uint32_t)Timeout & FMPI2C_TIMEOUTR_TIMEOUTA) ;
1062
1063 /* Store the new register value */
1064 FMPI2Cx->TIMEOUTR = tmpreg;
1065 }
1066
1067 /**
1068 * @brief Configures the FMPI2C Bus Timeout B (SCL cumulative Timeout).
1069 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1070 * @param Timeout: specifies the TimeoutB to be programmed.
1071 * @retval None
1072 */
FMPI2C_TimeoutBConfig(FMPI2C_TypeDef * FMPI2Cx,uint16_t Timeout)1073 void FMPI2C_TimeoutBConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t Timeout)
1074 {
1075 uint32_t tmpreg = 0;
1076
1077 /* Check the parameters */
1078 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1079 assert_param(IS_FMPI2C_TIMEOUT(Timeout));
1080
1081 /* Get the old register value */
1082 tmpreg = FMPI2Cx->TIMEOUTR;
1083
1084 /* Reset FMPI2Cx TIMEOUTB bit [11:0] */
1085 tmpreg &= (uint32_t)~((uint32_t)FMPI2C_TIMEOUTR_TIMEOUTB);
1086
1087 /* Set FMPI2Cx TIMEOUTB */
1088 tmpreg |= (uint32_t)(((uint32_t)Timeout << 16) & FMPI2C_TIMEOUTR_TIMEOUTB) ;
1089
1090 /* Store the new register value */
1091 FMPI2Cx->TIMEOUTR = tmpreg;
1092 }
1093
1094 /**
1095 * @brief Enables or disables FMPI2C PEC calculation.
1096 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1097 * @param NewState: new state of the FMPI2Cx PEC calculation.
1098 * This parameter can be: ENABLE or DISABLE.
1099 * @retval None
1100 */
FMPI2C_CalculatePEC(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)1101 void FMPI2C_CalculatePEC(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
1102 {
1103 /* Check the parameters */
1104 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1105 assert_param(IS_FUNCTIONAL_STATE(NewState));
1106
1107 if (NewState != DISABLE)
1108 {
1109 /* Enable PEC calculation */
1110 FMPI2Cx->CR1 |= FMPI2C_CR1_PECEN;
1111 }
1112 else
1113 {
1114 /* Disable PEC calculation */
1115 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_CR1_PECEN);
1116 }
1117 }
1118
1119 /**
1120 * @brief Enables or disables FMPI2C PEC transmission/reception request.
1121 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1122 * @param NewState: new state of the FMPI2Cx PEC request.
1123 * This parameter can be: ENABLE or DISABLE.
1124 * @retval None
1125 */
FMPI2C_PECRequestCmd(FMPI2C_TypeDef * FMPI2Cx,FunctionalState NewState)1126 void FMPI2C_PECRequestCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState)
1127 {
1128 /* Check the parameters */
1129 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1130 assert_param(IS_FUNCTIONAL_STATE(NewState));
1131
1132 if (NewState != DISABLE)
1133 {
1134 /* Enable PEC transmission/reception request */
1135 FMPI2Cx->CR1 |= FMPI2C_CR2_PECBYTE;
1136 }
1137 else
1138 {
1139 /* Disable PEC transmission/reception request */
1140 FMPI2Cx->CR1 &= (uint32_t)~((uint32_t)FMPI2C_CR2_PECBYTE);
1141 }
1142 }
1143
1144 /**
1145 * @brief Returns the FMPI2C PEC.
1146 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1147 * @retval The value of the PEC .
1148 */
FMPI2C_GetPEC(FMPI2C_TypeDef * FMPI2Cx)1149 uint8_t FMPI2C_GetPEC(FMPI2C_TypeDef* FMPI2Cx)
1150 {
1151 /* Check the parameters */
1152 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1153
1154 /* Return the slave matched address in the SR1 register */
1155 return (uint8_t)((uint32_t)FMPI2Cx->PECR & FMPI2C_PECR_PEC);
1156 }
1157
1158 /**
1159 * @}
1160 */
1161
1162
1163 /** @defgroup FMPI2C_Group4 FMPI2C registers management functions
1164 * @brief FMPI2C registers management functions
1165 *
1166 @verbatim
1167 ===============================================================================
1168 ##### FMPI2C registers management functions #####
1169 ===============================================================================
1170 [..] This section provides a functions that allow user the management of
1171 FMPI2C registers.
1172
1173 @endverbatim
1174 * @{
1175 */
1176
1177 /**
1178 * @brief Reads the specified FMPI2C register and returns its value.
1179 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1180 * @param FMPI2C_Register: specifies the register to read.
1181 * This parameter can be one of the following values:
1182 * @arg FMPI2C_Register_CR1: CR1 register.
1183 * @arg FMPI2C_Register_CR2: CR2 register.
1184 * @arg FMPI2C_Register_OAR1: OAR1 register.
1185 * @arg FMPI2C_Register_OAR2: OAR2 register.
1186 * @arg FMPI2C_Register_TIMINGR: TIMING register.
1187 * @arg FMPI2C_Register_TIMEOUTR: TIMEOUTR register.
1188 * @arg FMPI2C_Register_ISR: ISR register.
1189 * @arg FMPI2C_Register_ICR: ICR register.
1190 * @arg FMPI2C_Register_PECR: PECR register.
1191 * @arg FMPI2C_Register_RXDR: RXDR register.
1192 * @arg FMPI2C_Register_TXDR: TXDR register.
1193 * @retval The value of the read register.
1194 */
FMPI2C_ReadRegister(FMPI2C_TypeDef * FMPI2Cx,uint8_t FMPI2C_Register)1195 uint32_t FMPI2C_ReadRegister(FMPI2C_TypeDef* FMPI2Cx, uint8_t FMPI2C_Register)
1196 {
1197 __IO uint32_t tmp = 0;
1198
1199 /* Check the parameters */
1200 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1201 assert_param(IS_FMPI2C_REGISTER(FMPI2C_Register));
1202
1203 tmp = (uint32_t)FMPI2Cx;
1204 tmp += FMPI2C_Register;
1205
1206 /* Return the selected register value */
1207 return (*(__IO uint32_t *) tmp);
1208 }
1209
1210 /**
1211 * @}
1212 */
1213
1214 /** @defgroup FMPI2C_Group5 Data transfers management functions
1215 * @brief Data transfers management functions
1216 *
1217 @verbatim
1218 ===============================================================================
1219 ##### Data transfers management functions #####
1220 ===============================================================================
1221 [..] This subsection provides a set of functions allowing to manage
1222 the FMPI2C data transfers.
1223
1224 [..] The read access of the FMPI2C_RXDR register can be done using
1225 the FMPI2C_ReceiveData() function and returns the received value.
1226 Whereas a write access to the FMPI2C_TXDR can be done using FMPI2C_SendData()
1227 function and stores the written data into TXDR.
1228 @endverbatim
1229 * @{
1230 */
1231
1232 /**
1233 * @brief Sends a data byte through the FMPI2Cx peripheral.
1234 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1235 * @param Data: Byte to be transmitted..
1236 * @retval None
1237 */
FMPI2C_SendData(FMPI2C_TypeDef * FMPI2Cx,uint8_t Data)1238 void FMPI2C_SendData(FMPI2C_TypeDef* FMPI2Cx, uint8_t Data)
1239 {
1240 /* Check the parameters */
1241 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1242
1243 /* Write in the DR register the data to be sent */
1244 FMPI2Cx->TXDR = (uint8_t)Data;
1245 }
1246
1247 /**
1248 * @brief Returns the most recent received data by the FMPI2Cx peripheral.
1249 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1250 * @retval The value of the received data.
1251 */
FMPI2C_ReceiveData(FMPI2C_TypeDef * FMPI2Cx)1252 uint8_t FMPI2C_ReceiveData(FMPI2C_TypeDef* FMPI2Cx)
1253 {
1254 /* Check the parameters */
1255 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1256
1257 /* Return the data in the DR register */
1258 return (uint8_t)FMPI2Cx->RXDR;
1259 }
1260
1261 /**
1262 * @}
1263 */
1264
1265
1266 /** @defgroup FMPI2C_Group6 DMA transfers management functions
1267 * @brief DMA transfers management functions
1268 *
1269 @verbatim
1270 ===============================================================================
1271 ##### DMA transfers management functions #####
1272 ===============================================================================
1273 [..] This section provides two functions that can be used only in DMA mode.
1274 [..] In DMA Mode, the FMPI2C communication can be managed by 2 DMA Channel
1275 requests:
1276 (#) FMPI2C_DMAReq_Tx: specifies the Tx buffer DMA transfer request.
1277 (#) FMPI2C_DMAReq_Rx: specifies the Rx buffer DMA transfer request.
1278 [..] In this Mode it is advised to use the following function:
1279 (+) FMPI2C_DMACmd(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_DMAReq, FunctionalState NewState);
1280 @endverbatim
1281 * @{
1282 */
1283
1284 /**
1285 * @brief Enables or disables the FMPI2C DMA interface.
1286 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1287 * @param FMPI2C_DMAReq: specifies the FMPI2C DMA transfer request to be enabled or disabled.
1288 * This parameter can be any combination of the following values:
1289 * @arg FMPI2C_DMAReq_Tx: Tx DMA transfer request
1290 * @arg FMPI2C_DMAReq_Rx: Rx DMA transfer request
1291 * @param NewState: new state of the selected FMPI2C DMA transfer request.
1292 * This parameter can be: ENABLE or DISABLE.
1293 * @retval None
1294 */
FMPI2C_DMACmd(FMPI2C_TypeDef * FMPI2Cx,uint32_t FMPI2C_DMAReq,FunctionalState NewState)1295 void FMPI2C_DMACmd(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_DMAReq, FunctionalState NewState)
1296 {
1297 /* Check the parameters */
1298 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1299 assert_param(IS_FUNCTIONAL_STATE(NewState));
1300 assert_param(IS_FMPI2C_DMA_REQ(FMPI2C_DMAReq));
1301
1302 if (NewState != DISABLE)
1303 {
1304 /* Enable the selected FMPI2C DMA requests */
1305 FMPI2Cx->CR1 |= FMPI2C_DMAReq;
1306 }
1307 else
1308 {
1309 /* Disable the selected FMPI2C DMA requests */
1310 FMPI2Cx->CR1 &= (uint32_t)~FMPI2C_DMAReq;
1311 }
1312 }
1313 /**
1314 * @}
1315 */
1316
1317
1318 /** @defgroup FMPI2C_Group7 Interrupts and flags management functions
1319 * @brief Interrupts and flags management functions
1320 *
1321 @verbatim
1322 ===============================================================================
1323 ##### Interrupts and flags management functions #####
1324 ===============================================================================
1325 [..] This section provides functions allowing to configure the FMPI2C Interrupts
1326 sources and check or clear the flags or pending bits status.
1327 The user should identify which mode will be used in his application to manage
1328 the communication: Polling mode, Interrupt mode or DMA mode(refer FMPI2C_Group6) .
1329
1330 *** Polling Mode ***
1331 ====================
1332 [..] In Polling Mode, the FMPI2C communication can be managed by 15 flags:
1333 (#) FMPI2C_FLAG_TXE: to indicate the status of Transmit data register empty flag.
1334 (#) FMPI2C_FLAG_TXIS: to indicate the status of Transmit interrupt status flag .
1335 (#) FMPI2C_FLAG_RXNE: to indicate the status of Receive data register not empty flag.
1336 (#) FMPI2C_FLAG_ADDR: to indicate the status of Address matched flag (slave mode).
1337 (#) FMPI2C_FLAG_NACKF: to indicate the status of NACK received flag.
1338 (#) FMPI2C_FLAG_STOPF: to indicate the status of STOP detection flag.
1339 (#) FMPI2C_FLAG_TC: to indicate the status of Transfer complete flag(master mode).
1340 (#) FMPI2C_FLAG_TCR: to indicate the status of Transfer complete reload flag.
1341 (#) FMPI2C_FLAG_BERR: to indicate the status of Bus error flag.
1342 (#) FMPI2C_FLAG_ARLO: to indicate the status of Arbitration lost flag.
1343 (#) FMPI2C_FLAG_OVR: to indicate the status of Overrun/Underrun flag.
1344 (#) FMPI2C_FLAG_PECERR: to indicate the status of PEC error in reception flag.
1345 (#) FMPI2C_FLAG_TIMEOUT: to indicate the status of Timeout or Tlow detection flag.
1346 (#) FMPI2C_FLAG_ALERT: to indicate the status of SMBus Alert flag.
1347 (#) FMPI2C_FLAG_BUSY: to indicate the status of Bus busy flag.
1348
1349 [..] In this Mode it is advised to use the following functions:
1350 (+) FlagStatus FMPI2C_GetFlagStatus(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_FLAG);
1351 (+) void FMPI2C_ClearFlag(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_FLAG);
1352
1353 [..]
1354 (@)Do not use the BUSY flag to handle each data transmission or reception.It is
1355 better to use the TXIS and RXNE flags instead.
1356
1357 *** Interrupt Mode ***
1358 ======================
1359 [..] In Interrupt Mode, the FMPI2C communication can be managed by 7 interrupt sources
1360 and 15 pending bits:
1361 [..] Interrupt Source:
1362 (#) FMPI2C_IT_ERRI: specifies the interrupt source for the Error interrupt.
1363 (#) FMPI2C_IT_TCI: specifies the interrupt source for the Transfer Complete interrupt.
1364 (#) FMPI2C_IT_STOPI: specifies the interrupt source for the Stop Detection interrupt.
1365 (#) FMPI2C_IT_NACKI: specifies the interrupt source for the Not Acknowledge received interrupt.
1366 (#) FMPI2C_IT_ADDRI: specifies the interrupt source for the Address Match interrupt.
1367 (#) FMPI2C_IT_RXI: specifies the interrupt source for the RX interrupt.
1368 (#) FMPI2C_IT_TXI: specifies the interrupt source for the TX interrupt.
1369
1370 [..] Pending Bits:
1371 (#) FMPI2C_IT_TXIS: to indicate the status of Transmit interrupt status flag.
1372 (#) FMPI2C_IT_RXNE: to indicate the status of Receive data register not empty flag.
1373 (#) FMPI2C_IT_ADDR: to indicate the status of Address matched flag (slave mode).
1374 (#) FMPI2C_IT_NACKF: to indicate the status of NACK received flag.
1375 (#) FMPI2C_IT_STOPF: to indicate the status of STOP detection flag.
1376 (#) FMPI2C_IT_TC: to indicate the status of Transfer complete flag (master mode).
1377 (#) FMPI2C_IT_TCR: to indicate the status of Transfer complete reload flag.
1378 (#) FMPI2C_IT_BERR: to indicate the status of Bus error flag.
1379 (#) FMPI2C_IT_ARLO: to indicate the status of Arbitration lost flag.
1380 (#) FMPI2C_IT_OVR: to indicate the status of Overrun/Underrun flag.
1381 (#) FMPI2C_IT_PECERR: to indicate the status of PEC error in reception flag.
1382 (#) FMPI2C_IT_TIMEOUT: to indicate the status of Timeout or Tlow detection flag.
1383 (#) FMPI2C_IT_ALERT: to indicate the status of SMBus Alert flag.
1384
1385 [..] In this Mode it is advised to use the following functions:
1386 (+) void FMPI2C_ClearITPendingBit(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT);
1387 (+) ITStatus FMPI2C_GetITStatus(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT);
1388
1389 @endverbatim
1390 * @{
1391 */
1392
1393 /**
1394 * @brief Checks whether the specified FMPI2C flag is set or not.
1395 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1396 * @param FMPI2C_FLAG: specifies the flag to check.
1397 * This parameter can be one of the following values:
1398 * @arg FMPI2C_FLAG_TXE: Transmit data register empty
1399 * @arg FMPI2C_FLAG_TXIS: Transmit interrupt status
1400 * @arg FMPI2C_FLAG_RXNE: Receive data register not empty
1401 * @arg FMPI2C_FLAG_ADDR: Address matched (slave mode)
1402 * @arg FMPI2C_FLAG_NACKF: NACK received flag
1403 * @arg FMPI2C_FLAG_STOPF: STOP detection flag
1404 * @arg FMPI2C_FLAG_TC: Transfer complete (master mode)
1405 * @arg FMPI2C_FLAG_TCR: Transfer complete reload
1406 * @arg FMPI2C_FLAG_BERR: Bus error
1407 * @arg FMPI2C_FLAG_ARLO: Arbitration lost
1408 * @arg FMPI2C_FLAG_OVR: Overrun/Underrun
1409 * @arg FMPI2C_FLAG_PECERR: PEC error in reception
1410 * @arg FMPI2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
1411 * @arg FMPI2C_FLAG_ALERT: SMBus Alert
1412 * @arg FMPI2C_FLAG_BUSY: Bus busy
1413 * @retval The new state of FMPI2C_FLAG (SET or RESET).
1414 */
FMPI2C_GetFlagStatus(FMPI2C_TypeDef * FMPI2Cx,uint32_t FMPI2C_FLAG)1415 FlagStatus FMPI2C_GetFlagStatus(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_FLAG)
1416 {
1417 uint32_t tmpreg = 0;
1418 FlagStatus bitstatus = RESET;
1419
1420 /* Check the parameters */
1421 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1422 assert_param(IS_FMPI2C_GET_FLAG(FMPI2C_FLAG));
1423
1424 /* Get the ISR register value */
1425 tmpreg = FMPI2Cx->ISR;
1426
1427 /* Get flag status */
1428 tmpreg &= FMPI2C_FLAG;
1429
1430 if(tmpreg != 0)
1431 {
1432 /* FMPI2C_FLAG is set */
1433 bitstatus = SET;
1434 }
1435 else
1436 {
1437 /* FMPI2C_FLAG is reset */
1438 bitstatus = RESET;
1439 }
1440 return bitstatus;
1441 }
1442
1443 /**
1444 * @brief Clears the FMPI2Cx's pending flags.
1445 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1446 * @param FMPI2C_FLAG: specifies the flag to clear.
1447 * This parameter can be any combination of the following values:
1448 * @arg FMPI2C_FLAG_ADDR: Address matched (slave mode)
1449 * @arg FMPI2C_FLAG_NACKF: NACK received flag
1450 * @arg FMPI2C_FLAG_STOPF: STOP detection flag
1451 * @arg FMPI2C_FLAG_BERR: Bus error
1452 * @arg FMPI2C_FLAG_ARLO: Arbitration lost
1453 * @arg FMPI2C_FLAG_OVR: Overrun/Underrun
1454 * @arg FMPI2C_FLAG_PECERR: PEC error in reception
1455 * @arg FMPI2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
1456 * @arg FMPI2C_FLAG_ALERT: SMBus Alert
1457 * @retval The new state of FMPI2C_FLAG (SET or RESET).
1458 */
FMPI2C_ClearFlag(FMPI2C_TypeDef * FMPI2Cx,uint32_t FMPI2C_FLAG)1459 void FMPI2C_ClearFlag(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_FLAG)
1460 {
1461 /* Check the parameters */
1462 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1463 assert_param(IS_FMPI2C_CLEAR_FLAG(FMPI2C_FLAG));
1464
1465 /* Clear the selected flag */
1466 FMPI2Cx->ICR = FMPI2C_FLAG;
1467 }
1468
1469 /**
1470 * @brief Checks whether the specified FMPI2C interrupt has occurred or not.
1471 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1472 * @param FMPI2C_IT: specifies the interrupt source to check.
1473 * This parameter can be one of the following values:
1474 * @arg FMPI2C_IT_TXIS: Transmit interrupt status
1475 * @arg FMPI2C_IT_RXNE: Receive data register not empty
1476 * @arg FMPI2C_IT_ADDR: Address matched (slave mode)
1477 * @arg FMPI2C_IT_NACKF: NACK received flag
1478 * @arg FMPI2C_IT_STOPF: STOP detection flag
1479 * @arg FMPI2C_IT_TC: Transfer complete (master mode)
1480 * @arg FMPI2C_IT_TCR: Transfer complete reload
1481 * @arg FMPI2C_IT_BERR: Bus error
1482 * @arg FMPI2C_IT_ARLO: Arbitration lost
1483 * @arg FMPI2C_IT_OVR: Overrun/Underrun
1484 * @arg FMPI2C_IT_PECERR: PEC error in reception
1485 * @arg FMPI2C_IT_TIMEOUT: Timeout or Tlow detection flag
1486 * @arg FMPI2C_IT_ALERT: SMBus Alert
1487 * @retval The new state of FMPI2C_IT (SET or RESET).
1488 */
FMPI2C_GetITStatus(FMPI2C_TypeDef * FMPI2Cx,uint32_t FMPI2C_IT)1489 ITStatus FMPI2C_GetITStatus(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT)
1490 {
1491 uint32_t tmpreg = 0;
1492 ITStatus bitstatus = RESET;
1493 uint32_t enablestatus = 0;
1494
1495 /* Check the parameters */
1496 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1497 assert_param(IS_FMPI2C_GET_IT(FMPI2C_IT));
1498
1499 /* Check if the interrupt source is enabled or not */
1500 /* If Error interrupt */
1501 if((uint32_t)(FMPI2C_IT & ERROR_IT_MASK))
1502 {
1503 enablestatus = (uint32_t)((FMPI2C_CR1_ERRIE) & (FMPI2Cx->CR1));
1504 }
1505 /* If TC interrupt */
1506 else if((uint32_t)(FMPI2C_IT & TC_IT_MASK))
1507 {
1508 enablestatus = (uint32_t)((FMPI2C_CR1_TCIE) & (FMPI2Cx->CR1));
1509 }
1510 else
1511 {
1512 enablestatus = (uint32_t)((FMPI2C_IT) & (FMPI2Cx->CR1));
1513 }
1514
1515 /* Get the ISR register value */
1516 tmpreg = FMPI2Cx->ISR;
1517
1518 /* Get flag status */
1519 tmpreg &= FMPI2C_IT;
1520
1521 /* Check the status of the specified FMPI2C flag */
1522 if((tmpreg != RESET) && enablestatus)
1523 {
1524 /* FMPI2C_IT is set */
1525 bitstatus = SET;
1526 }
1527 else
1528 {
1529 /* FMPI2C_IT is reset */
1530 bitstatus = RESET;
1531 }
1532
1533 /* Return the FMPI2C_IT status */
1534 return bitstatus;
1535 }
1536
1537 /**
1538 * @brief Clears the FMPI2Cx's interrupt pending bits.
1539 * @param FMPI2Cx: where x can be 1 to select the FMPI2C peripheral.
1540 * @param FMPI2C_IT: specifies the interrupt pending bit to clear.
1541 * This parameter can be any combination of the following values:
1542 * @arg FMPI2C_IT_ADDR: Address matched (slave mode)
1543 * @arg FMPI2C_IT_NACKF: NACK received flag
1544 * @arg FMPI2C_IT_STOPF: STOP detection flag
1545 * @arg FMPI2C_IT_BERR: Bus error
1546 * @arg FMPI2C_IT_ARLO: Arbitration lost
1547 * @arg FMPI2C_IT_OVR: Overrun/Underrun
1548 * @arg FMPI2C_IT_PECERR: PEC error in reception
1549 * @arg FMPI2C_IT_TIMEOUT: Timeout or Tlow detection flag
1550 * @arg FMPI2C_IT_ALERT: SMBus Alert
1551 * @retval The new state of FMPI2C_IT (SET or RESET).
1552 */
FMPI2C_ClearITPendingBit(FMPI2C_TypeDef * FMPI2Cx,uint32_t FMPI2C_IT)1553 void FMPI2C_ClearITPendingBit(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT)
1554 {
1555 /* Check the parameters */
1556 assert_param(IS_FMPI2C_ALL_PERIPH(FMPI2Cx));
1557 assert_param(IS_FMPI2C_CLEAR_IT(FMPI2C_IT));
1558
1559 /* Clear the selected flag */
1560 FMPI2Cx->ICR = FMPI2C_IT;
1561 }
1562
1563 /**
1564 * @}
1565 */
1566
1567 /**
1568 * @}
1569 */
1570
1571 #endif /* STM32F446xx */
1572 /**
1573 * @}
1574 */
1575
1576 /**
1577 * @}
1578 */
1579
1580 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1581