1 /*
2 * Copyright 2014, General Dynamics C4 Systems
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 */
6
7 #include <arch/machine/hardware.h>
8
9 #if defined(CONFIG_ARM_CORTEX_A15) || defined(CONFIG_ARM_CORTEX_A7)
10 /* The hardware does not support tlb locking */
lockTLBEntry(vptr_t vaddr)11 void lockTLBEntry(vptr_t vaddr)
12 {
13
14 }
15
16 #else
17
lockTLBEntry(vptr_t vaddr)18 void lockTLBEntry(vptr_t vaddr)
19 {
20 int n = tlbLockCount;
21 int x, y;
22
23 tlbLockCount ++;
24 /* Compute two values, x and y, to write to the lockdown register. */
25
26 #if defined(CONFIG_ARM_CORTEX_A8)
27
28 /* Before lockdown, base = victim = num_locked_tlb_entries. */
29 x = 1 | (n << 22) | (n << 27);
30 n ++;
31 /* After lockdown, base = victim = num_locked_tlb_entries + 1. */
32 y = (n << 22) | (n << 27);
33
34 #elif defined(CONFIG_ARM_CORTEX_A9)
35
36 /* Before lockdown, victim = num_locked_tlb_entries. */
37 x = 1 | (n << 28);
38 n ++;
39 /* After lockdown, victim = num_locked_tlb_entries + 1. */
40 y = (n << 28);
41
42 #else
43
44 userError("Undefined CPU for TLB lockdown.\n");
45 halt();
46
47 #endif /* A8/A9 */
48
49 lockTLBEntryCritical(vaddr, x, y);
50 }
51
52 #endif /* A15/A7 */
53
54
55