1 /*
2  * Copyright (c) 2014-2022, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef TSP_PRIVATE_H
8 #define TSP_PRIVATE_H
9 
10 /*******************************************************************************
11  * The TSP memory footprint starts at address BL32_BASE and ends with the
12  * linker symbol __BL32_END__. Use these addresses to compute the TSP image
13  * size.
14  ******************************************************************************/
15 #define BL32_TOTAL_LIMIT BL32_END
16 #define BL32_TOTAL_SIZE (BL32_TOTAL_LIMIT - (unsigned long) BL32_BASE)
17 
18 #ifndef __ASSEMBLER__
19 
20 #include <stdint.h>
21 
22 #include <bl32/tsp/tsp.h>
23 #include <lib/cassert.h>
24 #include <lib/spinlock.h>
25 #include <smccc_helpers.h>
26 
27 typedef struct work_statistics {
28 	/* Number of s-el1 interrupts on this cpu */
29 	uint32_t sel1_intr_count;
30 	/* Number of non s-el1 interrupts on this cpu which preempted TSP */
31 	uint32_t preempt_intr_count;
32 	/* Number of sync s-el1 interrupts on this cpu */
33 	uint32_t sync_sel1_intr_count;
34 	/* Number of s-el1 interrupts returns on this cpu */
35 	uint32_t sync_sel1_intr_ret_count;
36 	uint32_t smc_count;		/* Number of returns on this cpu */
37 	uint32_t eret_count;		/* Number of entries on this cpu */
38 	uint32_t cpu_on_count;		/* Number of cpu on requests */
39 	uint32_t cpu_off_count;		/* Number of cpu off requests */
40 	uint32_t cpu_suspend_count;	/* Number of cpu suspend requests */
41 	uint32_t cpu_resume_count;	/* Number of cpu resume requests */
42 } __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t;
43 
44 /* Macros to access members of the above structure using their offsets */
45 #define read_sp_arg(args, offset)	((args)->_regs[offset >> 3])
46 #define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3])	\
47 					 = val)
48 
49 uint128_t tsp_get_magic(void);
50 
51 smc_args_t *set_smc_args(uint64_t arg0,
52 			 uint64_t arg1,
53 			 uint64_t arg2,
54 			 uint64_t arg3,
55 			 uint64_t arg4,
56 			 uint64_t arg5,
57 			 uint64_t arg6,
58 			 uint64_t arg7);
59 smc_args_t *tsp_cpu_resume_main(uint64_t max_off_pwrlvl,
60 				uint64_t arg1,
61 				uint64_t arg2,
62 				uint64_t arg3,
63 				uint64_t arg4,
64 				uint64_t arg5,
65 				uint64_t arg6,
66 				uint64_t arg7);
67 smc_args_t *tsp_cpu_suspend_main(uint64_t arg0,
68 				 uint64_t arg1,
69 				 uint64_t arg2,
70 				 uint64_t arg3,
71 				 uint64_t arg4,
72 				 uint64_t arg5,
73 				 uint64_t arg6,
74 				 uint64_t arg7);
75 smc_args_t *tsp_cpu_on_main(void);
76 smc_args_t *tsp_cpu_off_main(uint64_t arg0,
77 			     uint64_t arg1,
78 			     uint64_t arg2,
79 			     uint64_t arg3,
80 			     uint64_t arg4,
81 			     uint64_t arg5,
82 			     uint64_t arg6,
83 			     uint64_t arg7);
84 
85 /* Generic Timer functions */
86 void tsp_generic_timer_start(void);
87 void tsp_generic_timer_handler(void);
88 void tsp_generic_timer_stop(void);
89 void tsp_generic_timer_save(void);
90 void tsp_generic_timer_restore(void);
91 
92 /* S-EL1 interrupt management functions */
93 void tsp_update_sync_sel1_intr_stats(uint32_t type, uint64_t elr_el3);
94 
95 
96 /* Data structure to keep track of TSP statistics */
97 extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
98 
99 /* Vector table of jumps */
100 extern tsp_vectors_t tsp_vector_table;
101 
102 /* functions */
103 int32_t tsp_common_int_handler(void);
104 int32_t tsp_handle_preemption(void);
105 
106 smc_args_t *tsp_abort_smc_handler(uint64_t func,
107 				  uint64_t arg1,
108 				  uint64_t arg2,
109 				  uint64_t arg3,
110 				  uint64_t arg4,
111 				  uint64_t arg5,
112 				  uint64_t arg6,
113 				  uint64_t arg7);
114 
115 smc_args_t *tsp_smc_handler(uint64_t func,
116 			    uint64_t arg1,
117 			    uint64_t arg2,
118 			    uint64_t arg3,
119 			    uint64_t arg4,
120 			    uint64_t arg5,
121 			    uint64_t arg6,
122 			    uint64_t arg7);
123 
124 smc_args_t *tsp_system_reset_main(uint64_t arg0,
125 				  uint64_t arg1,
126 				  uint64_t arg2,
127 				  uint64_t arg3,
128 				  uint64_t arg4,
129 				  uint64_t arg5,
130 				  uint64_t arg6,
131 				  uint64_t arg7);
132 
133 smc_args_t *tsp_system_off_main(uint64_t arg0,
134 				uint64_t arg1,
135 				uint64_t arg2,
136 				uint64_t arg3,
137 				uint64_t arg4,
138 				uint64_t arg5,
139 				uint64_t arg6,
140 				uint64_t arg7);
141 
142 uint64_t tsp_main(void);
143 #endif /* __ASSEMBLER__ */
144 
145 #endif /* TSP_PRIVATE_H */
146