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Searched refs:BIT_SHIFT_FLASH_CLK_SEL (Results 1 – 4 of 4) sorted by relevance

/AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/include/
A Drtl8721dlp_sysreg.h329 #define BIT_SHIFT_FLASH_CLK_SEL 9 /* R/W 0 "SPIC clock sel:2'b00: ANA4M2'b01: XTAL2'b10: 400M P… macro
331 #define BIT_SHIFT_FLASH_CLK_ANA4M (0x0 << BIT_SHIFT_FLASH_CLK_SEL)
332 #define BIT_SHIFT_FLASH_CLK_XTAL (0x1 << BIT_SHIFT_FLASH_CLK_SEL)
333 #define BIT_SHIFT_FLASH_CLK_PLL (0x2 << BIT_SHIFT_FLASH_CLK_SEL)
A Drtl8721dlp_rcc.h156 Temp &= ~ (BIT_MASK_FLASH_CLK_SEL << BIT_SHIFT_FLASH_CLK_SEL); in RCC_PeriphClockSource_SPIC()
/AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/ram_common/
A Drtl8721d_flash_ram.c481 Temp &= ~(BIT_MASK_FLASH_CLK_SEL << BIT_SHIFT_FLASH_CLK_SEL); in FLASH_ClockSwitch()
528 Temp &= ~(BIT_MASK_FLASH_CLK_SEL << BIT_SHIFT_FLASH_CLK_SEL); in FLASH_ClockSwitch()
/AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/ram_lp/
A Drtl8721dlp_app_start.c94 Temp &= ~ (BIT_MASK_FLASH_CLK_SEL << BIT_SHIFT_FLASH_CLK_SEL); in app_retention_ram_patch()

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