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/AliOS-Things-master/hardware/chip/smarth_rv64/smarth_rv64/include/
A Dck_usart.h72 …__IOM uint32_t DLH; /* Offset: 0x004 (R/W) Clock frequency division high section registe… member
/AliOS-Things-master/hardware/chip/smarth_rv64/smarth_rv64/
A Dck_usart.c98 addr->DLH = (divisor >> 8) & 0xff; in csi_usart_config_baudrate()

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