1 /* 2 * Copyright (C) 2015-2020 Alibaba Group Holding Limited 3 */ 4 #ifndef __HAL_TRANSQ_H__ 5 #define __HAL_TRANSQ_H__ 6 7 #ifdef __cplusplus 8 extern "C" { 9 #endif 10 11 #ifdef CHIP_HAS_TRANSQ 12 13 #include "plat_types.h" 14 #define RX_NUM_NORMAL 30 15 #define TX_NUM_NORMAL 30 16 17 enum HAL_TRANSQ_ID_T { 18 HAL_TRANSQ_ID_0 = 0, 19 #if (CHIP_HAS_TRANSQ > 1) 20 HAL_TRANSQ_ID_1, 21 #endif 22 23 HAL_TRANSQ_ID_QTY 24 }; 25 26 enum HAL_TRANSQ_PRI_T { 27 HAL_TRANSQ_PRI_NORMAL = 0, 28 HAL_TRANSQ_PRI_HIGH, 29 30 HAL_TRANSQ_PRI_QTY 31 }; 32 33 enum HAL_TRANSQ_RET_T { 34 HAL_TRANSQ_RET_OK = 0, 35 HAL_TRANSQ_RET_BAD_ID, 36 HAL_TRANSQ_RET_BAD_PRI, 37 HAL_TRANSQ_RET_BAD_CFG, 38 HAL_TRANSQ_RET_BAD_SLOT, 39 HAL_TRANSQ_RET_BAD_TX_NUM, 40 HAL_TRANSQ_RET_BAD_RX_NUM, 41 HAL_TRANSQ_RET_BAD_MODE, 42 HAL_TRANSQ_RET_RX_EMPTY, 43 HAL_TRANSQ_RET_TX_FULL, 44 }; 45 46 typedef void (*HAL_TRANSQ_RX_IRQ_HANDLER)(enum HAL_TRANSQ_PRI_T pri); 47 typedef void (*HAL_TRANSQ_TX_IRQ_HANDLER)(enum HAL_TRANSQ_PRI_T pri, const uint8_t *data, uint32_t len); 48 49 struct HAL_TRANSQ_SLOT_NUM_T { 50 uint8_t tx_num[HAL_TRANSQ_PRI_QTY]; 51 uint8_t rx_num[HAL_TRANSQ_PRI_QTY]; 52 }; 53 54 struct HAL_TRANSQ_CFG_T { 55 struct HAL_TRANSQ_SLOT_NUM_T slot; 56 uint8_t rx_irq_count; 57 HAL_TRANSQ_RX_IRQ_HANDLER rx_handler; 58 HAL_TRANSQ_TX_IRQ_HANDLER tx_handler; 59 }; 60 61 enum HAL_TRANSQ_RET_T hal_transq_get_rx_status(enum HAL_TRANSQ_ID_T id, enum HAL_TRANSQ_PRI_T pri, bool *ready); 62 63 enum HAL_TRANSQ_RET_T hal_transq_get_tx_status(enum HAL_TRANSQ_ID_T id, enum HAL_TRANSQ_PRI_T pri, bool *done); 64 65 bool hal_transq_tx_busy(enum HAL_TRANSQ_ID_T id); 66 67 enum HAL_TRANSQ_RET_T hal_transq_rx_first(enum HAL_TRANSQ_ID_T id, enum HAL_TRANSQ_PRI_T pri, const uint8_t **data, uint32_t *len); 68 69 enum HAL_TRANSQ_RET_T hal_transq_rx_next(enum HAL_TRANSQ_ID_T id, enum HAL_TRANSQ_PRI_T pri, const uint8_t **data, uint32_t *len); 70 71 enum HAL_TRANSQ_RET_T hal_transq_tx(enum HAL_TRANSQ_ID_T id, enum HAL_TRANSQ_PRI_T pri, const uint8_t *data, uint32_t len); 72 73 enum HAL_TRANSQ_RET_T hal_transq_update_num(enum HAL_TRANSQ_ID_T id, const struct HAL_TRANSQ_SLOT_NUM_T *slot); 74 75 enum HAL_TRANSQ_RET_T hal_transq_open(enum HAL_TRANSQ_ID_T id, const struct HAL_TRANSQ_CFG_T *cfg); 76 77 enum HAL_TRANSQ_RET_T hal_transq_close(enum HAL_TRANSQ_ID_T id); 78 79 enum HAL_TRANSQ_RET_T hal_transq_flush(enum HAL_TRANSQ_ID_T id); 80 81 uint8_t get_rx_irq_count(enum HAL_TRANSQ_ID_T id); 82 83 #ifdef __ARM_ARCH_ISA_ARM 84 #ifdef RTOS 85 void hal_transq_local_irq_handler(int irq_num, void *irq_data); 86 #endif 87 #endif 88 89 #endif // CHIP_HAS_TRANSQ 90 91 #ifdef __cplusplus 92 } 93 #endif 94 95 #endif 96