Searched refs:HSCLK_GATE_SEQ (Results 1 – 1 of 1) sorted by relevance

/AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/ram_lp/
A D	rtl8721dlp_km4.c	106 CPU_PWR_SEQ HSCLK_GATE_SEQ[] = { variable 278 BOOT_ROM_CM4PON((u32)HSCLK_GATE_SEQ); in km4_clock_gate()

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