1 /* mbed Microcontroller Library - CMSIS 2 * Copyright (C) 2009-2011 ARM Limited. All rights reserved. 3 * 4 * A generic CMSIS include header, pulling in LPC11U24 specifics 5 */ 6 7 #ifndef MBED_CMSIS_H 8 #define MBED_CMSIS_H 9 10 #ifdef __cplusplus 11 extern "C" { 12 #endif 13 14 #include "plat_addr_map.h" 15 #include _TO_STRING(CONCAT_SUFFIX(CHIP_ID_LITERAL, h)) 16 17 #define IRQ_PRIORITY_REALTIME 0 18 #define IRQ_PRIORITY_HIGHPLUSPLUS 1 19 #define IRQ_PRIORITY_HIGHPLUS 2 20 #define IRQ_PRIORITY_HIGH 3 21 #define IRQ_PRIORITY_ABOVENORMAL 4 22 #define IRQ_PRIORITY_NORMAL 5 23 #define IRQ_PRIORITY_BELOWNORMAL 6 24 #define IRQ_PRIORITY_LOW 7 25 26 #ifdef __ARM_ARCH_ISA_ARM 27 #define IRQ_LOCK_MASK (CPSR_I_Msk | CPSR_F_Msk) 28 #else 29 #define NVIC_USER_IRQ_OFFSET 16 30 #define NVIC_NUM_VECTORS (NVIC_USER_IRQ_OFFSET + USER_IRQn_QTY) 31 #endif 32 33 #ifndef __ASSEMBLER__ 34 35 #ifdef __ARMCC_VERSION 36 // Stupid armclang 37 #undef __SSAT 38 #define __SSAT(ARG1,ARG2) \ 39 __extension__ \ 40 ({ \ 41 int32_t __RES, __ARG1 = (ARG1); \ 42 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 43 __RES; \ 44 }) 45 #endif 46 int_lock_global(void)47__STATIC_FORCEINLINE uint32_t int_lock_global(void) 48 { 49 #ifdef __ARM_ARCH_ISA_ARM 50 uint32_t cpsr = __get_CPSR(); 51 uint32_t st = cpsr & IRQ_LOCK_MASK; 52 if (st != IRQ_LOCK_MASK) { 53 cpsr |= IRQ_LOCK_MASK; 54 __set_CPSR(cpsr); 55 } 56 return st; 57 #else 58 uint32_t pri = __get_PRIMASK(); 59 if ((pri & 0x1) == 0) { 60 __disable_irq(); 61 } 62 return pri; 63 #endif 64 } 65 int_unlock_global(uint32_t pri)66__STATIC_FORCEINLINE void int_unlock_global(uint32_t pri) 67 { 68 #ifdef __ARM_ARCH_ISA_ARM 69 if (pri != IRQ_LOCK_MASK) { 70 uint32_t cpsr = __get_CPSR(); 71 cpsr = (cpsr & ~IRQ_LOCK_MASK) | pri; 72 __set_CPSR(cpsr); 73 } 74 #else 75 if ((pri & 0x1) == 0) { 76 __enable_irq(); 77 } 78 #endif 79 } 80 81 #if defined(RTOS) && defined(__ARM_ARCH_ISA_ARM) 82 extern uint32_t int_lock(void); 83 extern void int_unlock(uint32_t pri); 84 #else int_lock(void)85__STATIC_FORCEINLINE uint32_t int_lock(void) 86 { 87 #ifdef INT_LOCK_EXCEPTION 88 #ifdef __ARM_ARCH_ISA_ARM 89 uint32_t mask = GIC_GetInterfacePriorityMask(); 90 // Only allow IRQs with priority IRQ_PRIORITY_HIGHPLUSPLUS and IRQ_PRIORITY_REALTIME 91 GIC_SetInterfacePriorityMask(((IRQ_PRIORITY_HIGHPLUS << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL)); 92 return mask; 93 #else 94 uint32_t pri = __get_BASEPRI(); 95 // Only allow IRQs with priority IRQ_PRIORITY_HIGHPLUSPLUS and IRQ_PRIORITY_REALTIME 96 __set_BASEPRI(((IRQ_PRIORITY_HIGHPLUS << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL)); 97 return pri; 98 #endif 99 #else 100 return int_lock_global(); 101 #endif 102 } 103 int_unlock(uint32_t pri)104__STATIC_FORCEINLINE void int_unlock(uint32_t pri) 105 { 106 #ifdef INT_LOCK_EXCEPTION 107 #ifdef __ARM_ARCH_ISA_ARM 108 GIC_SetInterfacePriorityMask(pri); 109 #else 110 __set_BASEPRI(pri); 111 #endif 112 #else 113 int_unlock_global(pri); 114 #endif 115 } 116 #endif 117 in_isr(void)118__STATIC_FORCEINLINE int in_isr(void) 119 { 120 #ifdef __ARM_ARCH_ISA_ARM 121 #ifdef KERNEL_RHINO 122 extern int rhino_in_isr(void); 123 return rhino_in_isr(); 124 #else 125 uint32_t mode = __get_mode(); 126 return mode != CPSR_M_USR && mode != CPSR_M_SYS; 127 #endif 128 #else 129 #ifdef KERNEL_FREERTOS 130 extern int osIsIRQ(); 131 return osIsIRQ(); 132 #else 133 return __get_IPSR() != 0; 134 #endif 135 #endif 136 } 137 ftoi_nearest(float f)138__STATIC_FORCEINLINE int32_t ftoi_nearest(float f) 139 { 140 return (f >= 0) ? (int32_t)(f + 0.5) : (int32_t)(f - 0.5); 141 } 142 143 void GotBaseInit(void); 144 145 int set_bool_flag(bool *flag); 146 147 void clear_bool_flag(bool *flag); 148 149 float db_to_float(int32_t db); 150 151 uint32_t get_msb_pos(uint32_t val); 152 153 uint32_t get_lsb_pos(uint32_t val); 154 155 #endif 156 157 #ifdef __cplusplus 158 } 159 #endif 160 161 #endif 162