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Searched refs:KS_CLK_DIV (Results 1 – 2 of 2) sorted by relevance

/AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/ram_common/
A Drtl8721d_keyscan.c79 KeyScan->KS_CLK_DIV &= (~BIT_KS_CLK_DIV); in KeyScan_Init()
80 KeyScan->KS_CLK_DIV |= KeyScan_InitStruct->KS_ClkDiv; in KeyScan_Init()
/AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/include/
A Dhal_platform.h1154 __IO uint32_t KS_CLK_DIV; /*!< KEYSCAN clock divide register, Address offset: 0x00 */ member

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