1 #ifndef RWIP_CONFIG_H_ 2 #define RWIP_CONFIG_H_ 3 4 /** 5 **************************************************************************************** 6 * @addtogroup ROOT 7 * @{ 8 * 9 * Information about RW SW IP options and flags 10 * 11 * BT_DUAL_MODE BT/BLE Dual Mode 12 * BT_STD_MODE BT Only 13 * BLE_STD_MODE BLE Only 14 * 15 * BT_EMB_PRESENT BT controller exists 16 * BLE_EMB_PRESENT BLE controller exists 17 * BLE_HOST_PRESENT BLE host exists 18 * 19 * @name RW Stack Configuration 20 * @{ 21 **************************************************************************************** 22 */ 23 24 /* 25 * DEFINES 26 **************************************************************************************** 27 */ 28 #include "rwapp_config.h" // Audio Mode 0 configuration 29 #include "os_api.h" 30 #include "cmsis.h" 31 #include "besble_debug.h" 32 33 //#if (__IAG_BLE_INCLUDE__ == XA_ENABLED) 34 35 #ifdef __IAG_BLE_INCLUDE__ 36 #ifndef FPGA 37 #define _BLE_NVDS_ 38 #endif 39 #define CFG_BLE 40 #define CFG_HOST 41 #define CFG_APP 42 43 #if defined(BISTO_ENABLED) 44 #ifndef CFG_APP_SEC 45 #define CFG_APP_SEC 46 #endif 47 48 #define CFG_SEC_CON 49 #endif 50 #endif 51 52 #define GLOBAL_INT_DISABLE() do { uint32_t lock = int_lock(); 53 #define GLOBAL_INT_RESTORE() int_unlock(lock); } while(0); 54 55 /******************************************************************************************/ 56 /* -------------------------- GENERAL SETUP --------------------------------------*/ 57 /******************************************************************************************/ 58 59 /// Flag indicating if stack is compiled in dual or single mode 60 #if defined(CFG_BT) 61 #define BLE_STD_MODE 0 62 #if defined(CFG_BLE) 63 #define BT_DUAL_MODE 1 64 #define BT_STD_MODE 0 65 #else // CFG_BLE 66 #define BT_DUAL_MODE 0 67 #define BT_STD_MODE 1 68 #endif // CFG_BLE 69 #elif defined(CFG_BLE) 70 #define BT_DUAL_MODE 0 71 #define BT_STD_MODE 0 72 #define BLE_STD_MODE 1 73 #endif // CFG_BT 74 75 /******************************************************************************************/ 76 /* ------------------------- STACK PARTITIONING -----------------------------------*/ 77 /******************************************************************************************/ 78 79 #if (BT_DUAL_MODE) 80 #define BT_EMB_PRESENT 1 81 #define BLE_EMB_PRESENT 1 82 #define HCI_PRESENT 1 83 #define BLE_HOST_PRESENT 0 84 #define BLE_APP_PRESENT 0 85 #elif (BT_STD_MODE) 86 #define BT_EMB_PRESENT 1 87 #define BLE_EMB_PRESENT 0 88 #define HCI_PRESENT 1 89 #define BLE_HOST_PRESENT 0 90 #define BLE_APP_PRESENT 0 91 #elif (BLE_STD_MODE) 92 #define BT_EMB_PRESENT 0 93 #define HCI_PRESENT 1 94 #if defined(CFG_EMB) 95 #define BLE_EMB_PRESENT 1 96 #else 97 #define BLE_EMB_PRESENT 0 98 #endif //CFG_EMB 99 #if defined(CFG_HOST) 100 #define BLE_HOST_PRESENT 1 101 #else 102 #define BLE_HOST_PRESENT 0 103 #endif //CFG_HOST 104 #if defined(CFG_APP) 105 #define BLE_APP_PRESENT 1 106 #else 107 #define BLE_APP_PRESENT 0 108 #endif //CFG_APP 109 #endif // BT_DUAL_MODE / BT_STD_MODE / BLE_STD_MODE 110 111 #define EA_PRESENT (BT_EMB_PRESENT || BLE_EMB_PRESENT) 112 113 /******************************************************************************************/ 114 /* ------------------------- INTERFACES DEFINITIONS -------------------------------*/ 115 /******************************************************************************************/ 116 #define CFG_AHITL 117 #define CFG_HCITL 118 119 /// Application Host Interface 120 #if defined(CFG_AHITL) 121 #define AHI_TL_SUPPORT 1 122 #else // defined(CFG_AHITL) 123 #define AHI_TL_SUPPORT 0 124 #endif // defined(CFG_AHITL) 125 126 127 /// Host Controller Interface Support (defines if HCI parser is present or not) 128 #if defined(CFG_HCITL) 129 #define HCI_TL_SUPPORT 1 130 #else //defined(CFG_HCITL) 131 #define HCI_TL_SUPPORT 0 132 #endif //defined(CFG_HCITL) 133 134 135 #if BLE_HOST_PRESENT 136 #if BLE_EMB_PRESENT 137 #define H4TL_SUPPORT (AHI_TL_SUPPORT) 138 #else // !BLE_EMB_PRESENT 139 #define H4TL_SUPPORT 0//((AHI_TL_SUPPORT) + (HCI_TL_SUPPORT)) 140 #endif // BLE_EMB_PRESENT 141 #else // !BLE_HOST_PRESENT 142 #define H4TL_SUPPORT (HCI_TL_SUPPORT) 143 #endif // BLE_HOST_PRESENT 144 145 /// TCI LMP trace support 146 #define TCI_LMP_ENABLED 0 147 148 /******************************************************************************************/ 149 /* -------------------------- BLE COMMON DEFINITIONS ------------------------------*/ 150 /******************************************************************************************/ 151 /// Kernel Heap memory sized reserved for allocate dynamically connection environment 152 #define KE_HEAP_MEM_RESERVED (4) 153 154 #define CFG_ALLROLES 155 156 #if defined(CFG_BLE) 157 /// Application role definitions 158 #define BLE_BROADCASTER (defined(CFG_BROADCASTER) || defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES)) 159 #define BLE_OBSERVER (defined(CFG_OBSERVER) || defined(CFG_CENTRAL) || defined(CFG_ALLROLES)) 160 #define BLE_PERIPHERAL (defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES)) 161 #define BLE_CENTRAL (defined(CFG_CENTRAL) || defined(CFG_ALLROLES)) 162 #define CFG_EXT_DB 163 #if (!BLE_BROADCASTER) && (!BLE_OBSERVER) && (!BLE_PERIPHERAL) && (!BLE_CENTRAL) 164 #error "No application role defined" 165 #endif /* #if (!BLE_BROADCASTER) && (!BLE_OBSERVER) && (!BLE_PERIPHERAL) && (!BLE_CENTRAL) */ 166 167 /// Maximum number of simultaneous BLE activities (scan, connection, advertising, initiating) 168 #define BLE_ACTIVITY_MAX (BLE_CONNECTION_MAX) 169 170 /// Maximum number of audio connections 171 #if defined(CFG_AUDIO) 172 #if (BLE_CENTRAL || BLE_PERIPHERAL) 173 #define BLE_AUDIO (1) 174 #define BLE_AUDIO_CONNECT_MAX (CFG_AUDIO_CON) 175 #else 176 #define BLE_AUDIO (0) 177 #endif /*(BLE_CENTRAL || BLE_PERIPHERAL)*/ 178 #else 179 #define BLE_AUDIO (0) 180 #endif /*defined(CFG_AUDIO)*/ 181 182 /// Max advertising reports before sending the info to the host 183 #define BLE_ADV_REPORTS_MAX 1 184 185 /// Define Number of AUDIO TX/RX buffers per voice channel 186 #if (BLE_AUDIO) 187 #if defined(CFG_AUDIO_AOAHI) 188 // 3 buffers per connection using audio over AHI TL 189 #define BLE_NB_INPUT_BUFF_PER_VC (3) 190 #define BLE_NB_OUTPUT_BUFF_PER_VC (3) 191 #else // defined(CFG_AUDIO_AOAHI) 192 // 2 buffers if a codec is available 193 #define BLE_NB_INPUT_BUFF_PER_VC (2) 194 #define BLE_NB_OUTPUT_BUFF_PER_VC (2) 195 #endif // defined(CFG_AUDIO_AOAHI) 196 // add one more buffer for fake reception and fake transmit 197 #define BLE_TX_AUDIO_BUFFER_CNT ((BLE_AUDIO_CONNECT_MAX * BLE_NB_INPUT_BUFF_PER_VC) + 1) 198 #define BLE_RX_AUDIO_BUFFER_CNT ((BLE_AUDIO_CONNECT_MAX * BLE_NB_OUTPUT_BUFF_PER_VC) + 1) 199 #endif // (BLE_AUDIO) 200 201 #define CFG_DEPRECATED_API 202 /// Support of Legacy Air Operations 203 #if defined(CFG_DEPRECATED_API) 204 #define BLE_DEPRECATED_API (1) 205 #else //defined(CFG_DEPRECATED_API) 206 #define BLE_DEPRECATED_API (0) 207 #endif //defined(CFG_DEPRECATED_API) 208 #endif //defined(CFG_BLE) 209 210 211 /******************************************************************************************/ 212 /* -------------------------- DISPLAY SETUP -------------------------------------*/ 213 /******************************************************************************************/ 214 215 /// Display controller enable/disable 216 #if defined(CFG_DISPLAY) 217 #define DISPLAY_SUPPORT 1 218 #else 219 #define DISPLAY_SUPPORT 0 220 #endif //CFG_DISPLAY 221 222 223 /******************************************************************************************/ 224 /* -------------------------- RTC SETUP -------------------------------------*/ 225 /******************************************************************************************/ 226 227 /// RTC enable/disable 228 #if defined(CFG_RTC) 229 #define RTC_SUPPORT 1 230 #else 231 #define RTC_SUPPORT 0 232 #endif //CFG_DISPLAY 233 234 /******************************************************************************************/ 235 /* -------------------------- PS2 SETUP -------------------------------------*/ 236 /******************************************************************************************/ 237 238 /// PS2 enable/disable 239 #if defined(CFG_PS2) 240 #define PS2_SUPPORT 1 241 #else 242 #define PS2_SUPPORT 0 243 #endif //CFG_PS2 244 245 /******************************************************************************************/ 246 /* -------------------------- TRACER SETUP -------------------------------------*/ 247 /******************************************************************************************/ 248 249 /// tracer enable/disable 250 #if defined(CFG_TRC_EN) 251 #define TRACER_PRESENT 1 252 #include "dbg_trc_config.h" 253 #else 254 #define TRACER_PRESENT 0 255 #endif // CFG_TRC_EN 256 257 /******************************************************************************************/ 258 /* ------------------------- DEEP SLEEP SETUP -------------------------------------*/ 259 /******************************************************************************************/ 260 261 /// Use 32K Hz Clock if set to 1 else 32,768k is used 262 #define HZ32000 0 263 264 /// Time to wake-up Radio Module (in us) 265 #define SLEEP_RM_WAKEUP_DELAY 625 266 /// Time for stabilization of the high frequency oscillator following a sleep-timer expiry (in us) 267 #define SLEEP_OSC_NORMAL_WAKEUP_DELAY 5000 268 /// Time for stabilization of the high frequency oscillator following an external wake-up request (in us) 269 #define SLEEP_OSC_EXT_WAKEUP_DELAY 5000 270 271 /******************************************************************************************/ 272 /* -------------------------- RADIO SETUP ----------------------------------------*/ 273 /******************************************************************************************/ 274 275 /// Power control features 276 #define RF_TXPWR 1 277 /// Class of device 278 #define RF_CLASS1 0 279 280 /******************************************************************************************/ 281 /* ------------------------- SUPPORTED RADIO PHY ------------------------------------*/ 282 /******************************************************************************************/ 283 284 #if defined(CFG_RF_ATLAS) 285 #define BLE_PHY_1MBPS_SUPPORT 1 286 #define BLE_PHY_2MBPS_SUPPORT 1 287 #define BLE_PHY_CODED_SUPPORT 0 288 #else 289 #define BLE_PHY_1MBPS_SUPPORT 1 290 #define BLE_PHY_2MBPS_SUPPORT 1 291 #define BLE_PHY_CODED_SUPPORT 1 292 #endif 293 294 /******************************************************************************************/ 295 /* ------------------------- COEXISTENCE SETUP ------------------------------------*/ 296 /******************************************************************************************/ 297 298 /// WLAN Coexistence 299 #if defined(CFG_WLAN_COEX) 300 #define RW_WLAN_COEX 1 301 #define RW_WLAN_COEX_TEST (defined(CFG_WLAN_COEX_TEST)) 302 #else 303 #define RW_WLAN_COEX 0 304 #define RW_WLAN_COEX_TEST 0 305 #endif // defined(CFG_WLAN_COEX) 306 307 /// MWS Coexistence 308 #if defined(CFG_MWS_COEX) 309 #define RW_MWS_COEX 1 310 #define RW_MWS_COEX_TEST (defined(CFG_MWS_COEX_TEST)) 311 #else 312 #define RW_MWS_COEX 0 313 #define RW_MWS_COEX_TEST 0 314 #endif // defined(CFG_MWS_COEX) 315 316 /******************************************************************************************/ 317 /* ------------------------- DM ARBITRATION SETUP ---------------------------------*/ 318 /******************************************************************************************/ 319 320 #if BT_DUAL_MODE 321 /** 322 * Dual mode arbitration margin (in us) 323 * 324 * BREDRMARGIN/BLEMARGIN corresponding to a timing value that allows the RF to power-down properly before any other 325 * activity. This is radio dependent. 326 */ 327 #define DM_ARB_MARGIN 40 328 #endif //BT_DUAL_MODE 329 330 /******************************************************************************************/ 331 /* -------------------- SECURE CONNECTIONS SETUP --------------------------------------*/ 332 /******************************************************************************************/ 333 #if defined(CFG_SEC_CON) 334 #define SECURE_CONNECTIONS (1) 335 #if defined(CFG_ECC_16_BITS_ALGO) 336 #define ECC_MULT_ALGO_TYPE (16) 337 #else // !defined(CFG_ECC_16_BITS_ALGO) 338 #define ECC_MULT_ALGO_TYPE (32) 339 #endif // defined(CFG_ECC_16_BITS_ALGO) 340 #if defined(CFG_CRYPTO_UT) 341 #define CRYPTO_UT (1) 342 #else //defined(CFG_CRYPTO_UT) 343 #define CRYPTO_UT (0) 344 #endif //defined(CFG_CRYPTO_UT) 345 #else // !defined(CFG_SEC_CON) 346 #define SECURE_CONNECTIONS (0) 347 #define CRYPTO_UT (0) 348 #endif // defined(CFG_SEC_CON) 349 350 351 /******************************************************************************************/ 352 /* -------------------------- DEBUG SETUP ----------------------------------------*/ 353 /******************************************************************************************/ 354 355 /// Flag indicating if debug mode is activated or not 356 #if defined(CFG_DBG) 357 #define RW_DEBUG ((BLE_EMB_PRESENT) || (BT_EMB_PRESENT) || (BLE_HOST_PRESENT)) 358 #if (BLE_EMB_PRESENT || BT_EMB_PRESENT) 359 #define RW_SWDIAG 1 360 #else 361 #define RW_SWDIAG 0 362 #endif 363 #define KE_PROFILING 1 364 #else 365 #define RW_DEBUG 0 366 #define RW_SWDIAG 0 367 #define KE_PROFILING 0 368 #endif /* CFG_DBG */ 369 370 /// Flag indicating if Read/Write memory commands are supported or not 371 #if defined(CFG_DBG_MEM) 372 #define RW_DEBUG_MEM 1 373 #else //CFG_DBG_MEM 374 #define RW_DEBUG_MEM 0 375 #endif //CFG_DBG_MEM 376 377 /// Flag indicating if Flash debug commands are supported or not 378 #if defined(CFG_DBG_FLASH) 379 #define RW_DEBUG_FLASH 1 380 #else //CFG_DBG_FLASH 381 #define RW_DEBUG_FLASH 0 382 #endif //CFG_DBG_FLASH 383 384 /// Flag indicating if CPU stack profiling commands are supported or not 385 #if defined(CFG_DBG_STACK_PROF) 386 #define RW_DEBUG_STACK_PROF 1 387 #else 388 #define RW_DEBUG_STACK_PROF 0 389 #endif // defined (CFG_DBG_STACK_PROF) 390 391 /// Modem back to back setup 392 #define MODEM2MODEM 0 393 /// Special clock testing 394 #define CLK_WRAPPING 0 395 396 /******************************************************************************************/ 397 /* -------------------------- NVDS SETUP --------------------------------------*/ 398 /******************************************************************************************/ 399 400 /// Flag indicating if NVDS feature is supported or not 401 #if defined(CFG_NVDS) 402 #define NVDS_SUPPORT 1 403 #else //CFG_DBG_NVDS 404 #define NVDS_SUPPORT 0 405 #endif //CFG_DBG_NVDS 406 407 /******************************************************************************************/ 408 /* -------------------------- MISC SETUP --------------------------------------*/ 409 /******************************************************************************************/ 410 /// Manufacturer: RivieraWaves SAS 411 #define RW_COMP_ID 0x0060 412 413 /// Bluetooth technologies version 414 #define RW_BT40_VERSION (6) 415 #define RW_BT41_VERSION (7) 416 #define RW_BT42_VERSION (8) 417 #define RW_BT50_VERSION (9) 418 419 /******************************************************************************************/ 420 /* ------------------------- BT / BLE / BLE HL CONFIG -------------------------------*/ 421 /******************************************************************************************/ 422 423 #if 0 424 #if (BT_EMB_PRESENT) 425 #include "rwbt_config.h" // bt stack configuration 426 #endif //BT_EMB_PRESENT 427 428 #if (BLE_EMB_PRESENT) 429 #include "rwble_config.h" // ble stack configuration 430 #endif //BLE_EMB_PRESENT 431 #endif 432 433 #if (BLE_HOST_PRESENT) 434 #include "rwble_hl_config.h" // ble Host stack configuration 435 #endif //BLE_HOST_PRESENT 436 437 #if defined(CFG_AUDIO_AM0) 438 #include "rwam0_config.h" // Audio Mode 0 configuration 439 #endif // defined(CFG_AUDIO_AM0) 440 441 #if defined(CFG_APP) 442 //#include "rwapp_config.h" // Audio Mode 0 configuration 443 #endif // defined(CFG_APP) 444 445 #define BLE_INVALID_CONNECTION_INDEX 0xFF 446 447 448 449 #define SV_HIGH_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS 80 450 #define SV_HIGH_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS 400 451 #define SV_HIGH_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS 20000 452 453 #define SV_LOW_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS 400 454 #define SV_LOW_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS 1000 455 #define SV_LOW_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS 20000 456 457 458 /******************************************************************************************/ 459 /* ------------------------- KERNEL SETUP -------------------------------------*/ 460 /******************************************************************************************/ 461 462 /// Event types definition 463 enum KE_EVENT_TYPE 464 { 465 KE_EVENT_KE_MESSAGE , 466 KE_EVENT_KE_TIMER , 467 #if (TRACER_PRESENT) 468 KE_EVENT_TRC , 469 #endif /*(TRACER_PRESENT)*/ 470 471 #if (AHI_TL_SUPPORT) 472 KE_EVENT_AHI_TX_DONE , 473 #endif //(AHI_TL_SUPPORT) 474 475 #if (BLE_HOST_PRESENT) 476 #if (BLE_L2CC) 477 KE_EVENT_L2CAP_TX , 478 #endif //(BLE_L2CC) 479 #endif// (BLE_HOST_PRESENT) 480 481 KE_EVENT_MAX , 482 }; 483 484 /// Tasks types definition 485 enum KE_TASK_TYPE 486 { 487 #if (BLE_APP_PRESENT) 488 TASK_APP, 489 #endif // (BLE_APP_PRESENT) 490 491 #if (BLE_HOST_PRESENT) 492 TASK_L2CC, // L2CAP Controller Task 493 TASK_GATTM, // Generic Attribute Profile Manager Task 494 TASK_GATTC, // Generic Attribute Profile Controller Task 495 TASK_GAPM, // Generic Access Profile Manager, 4 496 TASK_GAPC, // Generic Access Profile Controller 497 498 // allocate a certain number of profiles task 499 TASK_PRF_MAX = (TASK_GAPC + BLE_NB_PROFILES), 500 501 #ifdef BLE_AUDIO_AM0_TASK 502 TASK_AM0, // BLE Audio Mode 0 Task 503 #endif // BLE_AUDIO_AM0_TASK 504 #endif // (BLE_HOST_PRESENT) 505 506 #if (AHI_TL_SUPPORT) 507 TASK_AHI, 508 #endif // (AHI_TL_SUPPORT) 509 510 /// Maximum number of tasks 511 TASK_MAX = 0xFE, 512 513 TASK_NONE = 0xFF, 514 }; 515 516 /// Kernel memory heaps types. 517 enum 518 { 519 /// Memory allocated for environment variables 520 KE_MEM_ENV, 521 #if (BLE_HOST_PRESENT) 522 /// Memory allocated for Attribute database 523 KE_MEM_ATT_DB, 524 #endif // (BLE_HOST_PRESENT) 525 /// Memory allocated for kernel messages 526 KE_MEM_KE_MSG, 527 /// Non Retention memory block 528 KE_MEM_NON_RETENTION, 529 KE_MEM_BLOCK_MAX, 530 }; 531 532 533 534 #if (BT_EMB_PRESENT) 535 #define BT_HEAP_MSG_SIZE_ BT_HEAP_MSG_SIZE 536 #define BT_HEAP_ENV_SIZE_ BT_HEAP_ENV_SIZE 537 #else 538 #define BT_HEAP_MSG_SIZE_ 0 539 #define BT_HEAP_ENV_SIZE_ 0 540 #endif //BT_EMB_PRESENT 541 542 #if (BLE_EMB_PRESENT) 543 #define BLE_HEAP_MSG_SIZE_ BLE_HEAP_MSG_SIZE 544 #define BLE_HEAP_ENV_SIZE_ BLE_HEAP_ENV_SIZE 545 #else 546 #define BLE_HEAP_MSG_SIZE_ 0 547 #define BLE_HEAP_ENV_SIZE_ 0 548 #endif //BLE_EMB_PRESENT 549 550 #if (BLE_HOST_PRESENT) 551 #define BLEHL_HEAP_MSG_SIZE_ BLEHL_HEAP_MSG_SIZE 552 #define BLEHL_HEAP_ENV_SIZE_ BLEHL_HEAP_ENV_SIZE 553 #define BLEHL_HEAP_DB_SIZE_ BLEHL_HEAP_DB_SIZE 554 #else 555 #define BLEHL_HEAP_MSG_SIZE_ 0 556 #define BLEHL_HEAP_ENV_SIZE_ 0 557 #define BLEHL_HEAP_DB_SIZE_ 0 558 #endif //BLE_HOST_PRESENT 559 560 561 /// Kernel Message Heap 562 #define RWIP_HEAP_MSG_SIZE ( BT_HEAP_MSG_SIZE_ + \ 563 BLE_HEAP_MSG_SIZE_ + \ 564 BLEHL_HEAP_MSG_SIZE_ ) 565 566 /// Number of link in kernel environment 567 #define KE_NB_LINK_IN_HEAP_ENV 4 568 569 /// Size of Environment heap 570 #define RWIP_HEAP_ENV_SIZE ( BT_HEAP_ENV_SIZE_ + \ 571 ( BLE_HEAP_ENV_SIZE_ + \ 572 BLEHL_HEAP_ENV_SIZE_ ) \ 573 * KE_NB_LINK_IN_HEAP_ENV ) 574 575 /// Size of Attribute database heap 576 #define RWIP_HEAP_DB_SIZE ( BLEHL_HEAP_DB_SIZE ) 577 578 /// Size of non retention heap - 512 bytes per ble link plus 4096 bytes for data throughput should be sufficient and should be tuned 579 #if (BLE_EMB_PRESENT || BLE_HOST_PRESENT) 580 #define RWIP_HEAP_NON_RET_SIZE (( 512 * BLE_CONNECTION_MAX ) + 4096) 581 #else 582 #define RWIP_HEAP_NON_RET_SIZE ( 1024 ) 583 #endif 584 585 /// Minimum sleep time to enter in deep sleep (in half slot). 586 #define RWIP_MINIMUM_SLEEP_TIME (1) 587 588 /******************************************************************************************/ 589 /* ------------------------- CONFIGURABLE PARAMETERS -----------------------------*/ 590 /******************************************************************************************/ 591 592 /// List of parameters identifiers 593 enum PARAM_ID 594 { 595 /// Definition of the tag associated to each parameters 596 /// Local Bd Address 597 PARAM_ID_BD_ADDRESS = 0x01, 598 /// Device Name 599 PARAM_ID_DEVICE_NAME = 0x02, 600 /// Radio Drift 601 PARAM_ID_LPCLK_DRIFT = 0x07, 602 /// Radio Jitter 603 PARAM_ID_LPCLK_JITTER = 0x08, 604 /// Radio Class 605 PARAM_ID_RADIO_CLASS = 0x09, 606 /// Bluejay specific Settings 607 PARAM_ID_BJ_TXCNTL1 = 0x0A, 608 /// External wake-up time 609 PARAM_ID_EXT_WAKEUP_TIME = 0x0D, 610 /// Oscillator wake-up time 611 PARAM_ID_OSC_WAKEUP_TIME = 0x0E, 612 /// Radio wake-up time 613 PARAM_ID_RM_WAKEUP_TIME = 0x0F, 614 /// UART baudrate 615 PARAM_ID_UART_BAUDRATE = 0x10, 616 /// Enable sleep mode 617 PARAM_ID_SLEEP_ENABLE = 0x11, 618 /// Enable External Wakeup 619 PARAM_ID_EXT_WAKEUP_ENABLE = 0x12, 620 /// SP Private Key 192 621 PARAM_ID_SP_PRIVATE_KEY_P192 = 0x13, 622 /// SP Public Key 192 623 PARAM_ID_SP_PUBLIC_KEY_P192 = 0x14, 624 /// Errata adopted check 625 PARAM_ID_ERRATA_ADOPTED = 0x15, 626 /// CQDDR Tags 627 PARAM_ID_BASIC_THRESHOLD = 0x16, 628 PARAM_ID_EDR_THRESHOLD = 0x17, 629 PARAM_ID_BASIC_ALGORITHM = 0x18, 630 PARAM_ID_EDR_ALGORITHM = 0x19, 631 PARAM_ID_BASIC_PACKET_LUT = 0x2A, 632 PARAM_ID_EDR_PACKET_LUT = 0x2B, 633 /// Synchronous links configuration 634 PARAM_ID_SYNC_CONFIG = 0x2C, 635 /// PCM Settings 636 PARAM_ID_PCM_SETTINGS = 0x2D, 637 /// Sleep algorithm duration 638 PARAM_ID_SLEEP_ALGO_DUR = 0x2E, 639 640 /// Diagport configuration 641 PARAM_ID_DIAG_BT_HW = 0x30, 642 PARAM_ID_DIAG_BLE_HW = 0x31, 643 PARAM_ID_DIAG_SW = 0x32, 644 PARAM_ID_DIAG_PLF = 0x34, 645 646 /// RSSI threshold tags 647 PARAM_ID_RSSI_HIGH_THR = 0x3A, 648 PARAM_ID_RSSI_LOW_THR = 0x3B, 649 PARAM_ID_RSSI_INTERF_THR = 0x3C, 650 651 /// BLE Channel Assessment tags 652 PARAM_ID_BLE_CA_TIMER_DUR = 0x40, 653 PARAM_ID_BLE_CRA_TIMER_CNT = 0x41, 654 PARAM_ID_BLE_CA_MIN_THR = 0x42, 655 PARAM_ID_BLE_CA_MAX_THR = 0x43, 656 PARAM_ID_BLE_CA_NOISE_THR = 0x44, 657 658 /// AFH algorithm tags 659 PARAM_ID_AFH_REASS_NBCH = 0x51, 660 PARAM_ID_AFH_WINLGTH = 0x52, 661 PARAM_ID_AFH_RSSIMIN = 0x53, 662 PARAM_ID_AFH_PERTHRESBAD = 0x54, 663 PARAM_ID_AFH_REASS_INT = 0x55, 664 PARAM_ID_AFH_NMIN = 0x56, 665 PARAM_ID_AFH_MAXADAPT = 0x57, 666 PARAM_ID_AFH_THSMIN = 0x58, 667 668 669 PARAM_ID_BT_LINK_KEY_FIRST = 0x60, 670 PARAM_ID_BT_LINK_KEY_LAST = 0x67, 671 672 PARAM_ID_BLE_LINK_KEY_FIRST = 0x70, 673 PARAM_ID_BLE_LINK_KEY_LAST = 0x7F, 674 /// SC Private Key (Low Energy) 675 PARAM_ID_LE_PRIVATE_KEY_P256 = 0x80, 676 /// SC Public Key (Low Energy) 677 PARAM_ID_LE_PUBLIC_KEY_P256 = 0x81, 678 /// SC Debug: Used Fixed Private Key from NVDS (Low Energy) 679 PARAM_ID_LE_DBG_FIXED_P256_KEY = 0x82, 680 /// SP Private Key (classic BT) 681 PARAM_ID_SP_PRIVATE_KEY_P256 = 0x83, 682 /// SP Public Key (classic BT) 683 PARAM_ID_SP_PUBLIC_KEY_P256 = 0x84, 684 685 /// Application specific 686 PARAM_ID_APP_SPECIFIC_FIRST = 0x90, 687 PARAM_ID_APP_SPECIFIC_LAST = 0xAF, 688 }; 689 690 /// List of parameters lengths 691 enum PARAM_LEN 692 { 693 // Definition of length associated to each parameters 694 /// Local Bd Address 695 PARAM_LEN_BD_ADDRESS = 6, 696 /// Device Name 697 PARAM_LEN_DEVICE_NAME = 248, 698 /// Low power clock drift 699 PARAM_LEN_LPCLK_DRIFT = 2, 700 /// Low power clock jitter 701 PARAM_LEN_LPCLK_JITTER = 1, 702 /// Radio Class 703 PARAM_LEN_RADIO_CLASS = 1, 704 /// Bluejay specific Settings 705 PARAM_LEN_BJ_TXCNTL1 = 4, 706 707 708 /// External wake-up time 709 PARAM_LEN_EXT_WAKEUP_TIME = 2, 710 /// Oscillator wake-up time 711 PARAM_LEN_OSC_WAKEUP_TIME = 2, 712 /// Radio wake-up time 713 PARAM_LEN_RM_WAKEUP_TIME = 2, 714 /// UART baudrate 715 PARAM_LEN_UART_BAUDRATE = 4, 716 /// Enable sleep mode 717 PARAM_LEN_SLEEP_ENABLE = 1, 718 /// Enable External Wakeup 719 PARAM_LEN_EXT_WAKEUP_ENABLE = 1, 720 /// SP Private Key 192 721 PARAM_LEN_SP_PRIVATE_KEY_P192 = 24, 722 /// SP Public Key 192 723 PARAM_LEN_SP_PUBLIC_KEY_P192 = 48, 724 /// Errata adopted check 725 PARAM_LEN_ERRATA_ADOPTED = 1, 726 /// CQDDR Tags 727 PARAM_LEN_BASIC_THRESHOLD = 70, 728 PARAM_LEN_EDR_THRESHOLD = 70, 729 PARAM_LEN_BASIC_ALGORITHM = 21, 730 PARAM_LEN_EDR_ALGORITHM = 21, 731 PARAM_LEN_BASIC_PACKET_LUT = 16, 732 PARAM_LEN_EDR_PACKET_LUT = 16, 733 /// Synchronous links configuration 734 PARAM_LEN_SYNC_CONFIG = 2, 735 /// PCM Settings 736 PARAM_LEN_PCM_SETTINGS = 8, 737 /// Diagport configuration 738 PARAM_LEN_DIAG_BT_HW = 4, 739 PARAM_LEN_DIAG_BLE_HW = 4, 740 PARAM_LEN_DIAG_SW = 4, 741 PARAM_LEN_DIAG_PLF = 4, 742 /// RSSI thresholds 743 PARAM_LEN_RSSI_THR = 1, 744 745 746 PARAM_LEN_BLE_CA_TIMER_DUR = 2, 747 PARAM_LEN_BLE_CRA_TIMER_CNT = 1, 748 PARAM_LEN_BLE_CA_MIN_THR = 1, 749 PARAM_LEN_BLE_CA_MAX_THR = 1, 750 PARAM_LEN_BLE_CA_NOISE_THR = 1, 751 752 /// AFH algorithm tags 753 PARAM_LEN_AFH_REASS_NBCH = 1, 754 PARAM_LEN_AFH_WINLGTH = 1, 755 PARAM_LEN_AFH_RSSIMIN = 1, 756 PARAM_LEN_AFH_PERTHRESBAD = 1, 757 PARAM_LEN_AFH_REASS_INT = 1, 758 PARAM_LEN_AFH_NMIN = 1, 759 PARAM_LEN_AFH_MAXADAPT = 1, 760 PARAM_LEN_AFH_THSMIN = 1, 761 /// Link keys 762 PARAM_LEN_BT_LINK_KEY = 22, 763 PARAM_LEN_BLE_LINK_KEY = 48, 764 765 /// P256 766 PARAM_LEN_PRIVATE_KEY_P256 = 32, 767 PARAM_LEN_PUBLIC_KEY_P256 = 64, 768 PARAM_LEN_DBG_FIXED_P256_KEY = 1, 769 }; 770 771 /******************************************************************************************/ 772 /* ------------------------- BT-BLE COEX -----------------------------------*/ 773 /******************************************************************************************/ 774 775 ///To let the HW using the default values set in the registers 776 #define RW_BLE_PTI_PRIO_AUTO 15 777 778 #if (BLE_EMB_PRESENT || BT_EMB_PRESENT) 779 /// Enable and diable definition for the PTI 780 ///Enable TX busy signal 781 #define RWIP_PTI_TXEN 1 782 ///Disable TX busy signal 783 #define RWIP_PTI_TXDIS 0 784 /// Tx busy position 785 #define RWIP_TXBSY_POS 0 786 787 ///Enable RX busy signal 788 #define RWIP_PTI_RXEN 1 789 ///Disable RX busy signal 790 #define RWIP_PTI_RXDIS 0 791 /// Rx busy position 792 #define RWIP_RXBSY_POS 1 793 794 ///Enable do not abort TX 795 #define RWIP_PTI_DNABORTEN 1 796 ///Disable do not abort TX 797 #define RWIP_PTI_DNABORTDIS 0 798 /// Do not abort busy position 799 #define RWIP_DNABORT_POS 2 800 801 ///Allows Tx operation in the current frame. 802 #define RWIP_MWS_TXEN 0 803 ///Prevent from any Tx operation in the current frame. 804 #define RWIP_MWS_TXDIS 1 805 /// MWS transmit disable position 806 #define RWIP_MWSTXDSB_POS 3 807 808 ///Allows Rx operation in the current frame. 809 #define RWIP_MWS_RXEN 0 810 ///Prevent from any Rx operation in the current frame. 811 #define RWIP_MWS_RXDIS 1 812 /// MWS transmit disable position 813 #define RWIP_MWSRXDSB_POS 4 814 815 /// Bit masking 816 #define RWIP_COEX_BIT_MASK 1 817 818 /// Coex configuration index 819 enum rwip_coex_config_idx 820 { 821 #if (BT_EMB_PRESENT) 822 RWIP_COEX_MSSWITCH_IDX , 823 RWIP_COEX_SNIFFATT_IDX , 824 RWIP_COEX_PAGE_IDX, 825 RWIP_COEX_PSCAN_IDX, 826 RWIP_COEX_INQ_IDX, 827 RWIP_COEX_INQRES_IDX, 828 RWIP_COEX_SCORSVD_IDX, 829 RWIP_COEX_BCAST_IDX, 830 RWIP_COEX_CONNECT_IDX, 831 #endif //#if (BT_EMB_PRESENT) 832 #if (BLE_EMB_PRESENT) 833 RWIP_COEX_CON_IDX, 834 RWIP_COEX_CON_DATA_IDX, 835 RWIP_COEX_ADV_IDX, 836 RWIP_COEX_SCAN_IDX, 837 RWIP_COEX_INIT_IDX, 838 #endif // #if (BLE_EMB_PRESENT) 839 /// Max configuration index 840 RWIP_COEX_CFG_MAX, 841 }; 842 #endif //(BLE_EMB_PRESENT || BT_EMB_PRESENT) 843 844 /******************************************************************************************/ 845 /* ------------------------- BT-BLE PRIORITIES -----------------------------------*/ 846 /******************************************************************************************/ 847 #if (BLE_EMB_PRESENT || BT_EMB_PRESENT) 848 /// Priority index definition 849 enum rwip_prio_idx 850 { 851 #if (BT_EMB_PRESENT) 852 /// ACL event default priority 853 RWIP_PRIO_ACL_DFT_IDX, 854 /// ACL event priority with activity 855 RWIP_PRIO_ACL_ACT_IDX, 856 /// ACL Role Switch event default priority 857 RWIP_PRIO_ACL_RSW_IDX, 858 /// ACL sniff event default priority 859 RWIP_PRIO_ACL_SNIFF_DFT_IDX, 860 /// ACL sniff transition event default priority 861 RWIP_PRIO_ACL_SNIFF_TRANS_IDX, 862 #if MAX_NB_SYNC 863 /// SCO event default priority 864 RWIP_PRIO_SCO_DFT_IDX, 865 #endif //MAX_NB_SYNC 866 /// Broadcast ACL event default priority 867 RWIP_PRIO_BCST_DFT_IDX, 868 /// Broadcast ACL event with LMP activity priority 869 RWIP_PRIO_BCST_ACT_IDX, 870 /// CSB RX event default priority 871 RWIP_PRIO_CSB_RX_DFT_IDX, 872 /// CSB TX event default priority 873 RWIP_PRIO_CSB_TX_DFT_IDX, 874 /// Inquiry event default priority 875 RWIP_PRIO_INQ_DFT_IDX, 876 /// Inquiry Scan event default priority 877 RWIP_PRIO_ISCAN_DFT_IDX, 878 /// Page event default priority 879 RWIP_PRIO_PAGE_DFT_IDX, 880 /// Page event default priority 881 RWIP_PRIO_PAGE_1ST_PKT_IDX, 882 /// Page first packet event default priority 883 RWIP_PRIO_PCA_DFT_IDX, 884 /// Page scan event default priority 885 RWIP_PRIO_PSCAN_DFT_IDX, 886 /// Page scan event priority increment when canceled 887 RWIP_PRIO_PSCAN_1ST_PKT_IDX, 888 /// Synchronization Scan event default priority 889 RWIP_PRIO_SSCAN_DFT_IDX, 890 /// Synchronization Train event default priority 891 RWIP_PRIO_STRAIN_DFT_IDX, 892 #endif //#if (BT_EMB_PRESENT) 893 #if (BLE_EMB_PRESENT) 894 /// Default priority for scanning events 895 RWIP_PRIO_SCAN_IDX, 896 /// Default priority for initiating events 897 RWIP_PRIO_INIT_IDX, 898 /// Default priority for master connect events 899 RWIP_PRIO_MCONNECT_IDX, 900 /// Default priority for slave connect events 901 RWIP_PRIO_SCONNECT_IDX, 902 /// Default priority for advertising events 903 RWIP_PRIO_ADV_IDX, 904 /// Default priority for advertising high duty cycle events 905 RWIP_PRIO_ADV_HDC_IDX, 906 /// Default priority for resolvable private addresses renewal event 907 RWIP_PRIO_RPA_RENEW_IDX, 908 #endif // #if (BLE_EMB_PRESENT) 909 RWIP_PRIO_IDX_MAX 910 }; 911 /// Default priority value definition 912 enum rwip_prio_dft 913 { 914 #if (BT_EMB_PRESENT) 915 /// ACL event default priority 916 RWIP_PRIO_ACL_DFT = 5, 917 /// ACL event priority with activity 918 RWIP_PRIO_ACL_ACT = 10, 919 /// ACL Role Switch event default priority 920 RWIP_PRIO_ACL_RSW = 20, 921 /// ACL sniff event default priority 922 RWIP_PRIO_ACL_SNIFF_DFT = 15, 923 /// ACL sniff transition event default priority 924 RWIP_PRIO_ACL_SNIFF_TRANS = 10, 925 #if MAX_NB_SYNC 926 /// SCO event default priority 927 RWIP_PRIO_SCO_DFT = 18, 928 #endif //MAX_NB_SYNC 929 /// Broadcast ACL event default priority 930 RWIP_PRIO_BCST_DFT = 5, 931 /// Broadcast ACL event with LMP activity priority 932 RWIP_PRIO_BCST_ACT = 10, 933 /// CSB RX event default priority 934 RWIP_PRIO_CSB_RX_DFT = 10, 935 /// CSB TX event default priority 936 RWIP_PRIO_CSB_TX_DFT = 10, 937 /// Inquiry event default priority 938 RWIP_PRIO_INQ_DFT = 5, 939 /// Inquiry Scan event default priority 940 RWIP_PRIO_ISCAN_DFT = 5, 941 /// Page event default priority 942 RWIP_PRIO_PAGE_DFT = 8, 943 /// Page first packet event default priority 944 RWIP_PRIO_PAGE_1ST_PKT = 20, 945 /// PCA event default priority 946 RWIP_PRIO_PCA_DFT = 20, 947 /// Page scan event default priority 948 RWIP_PRIO_PSCAN_DFT = 8, 949 /// Page scan event priority increment when canceled 950 RWIP_PRIO_PSCAN_1ST_PKT = 20, 951 /// Synchronization Scan event default priority 952 RWIP_PRIO_SSCAN_DFT = 10, 953 /// Synchronization Train event default priority 954 RWIP_PRIO_STRAIN_DFT = 10, 955 #endif //#if (BT_EMB_PRESENT) 956 #if (BLE_EMB_PRESENT) 957 /// Default priority for scanning events 958 RWIP_PRIO_SCAN_DFT = 5, 959 /// Default priority for initiating events 960 RWIP_PRIO_INIT_DFT = 10, 961 /// Default priority for master connect events 962 RWIP_PRIO_MCONNECT_DFT = 15, 963 /// Default priority for slave connect events 964 RWIP_PRIO_SCONNECT_DFT = 15, 965 /// Default priority for advertising events 966 RWIP_PRIO_ADV_DFT = 5, 967 /// Default priority for advertising high duty cycle events 968 RWIP_PRIO_ADV_HDC_DFT = 10, 969 /// Default priority for resolvable private addresses renewal event 970 RWIP_PRIO_RPA_RENEW_DFT = 10, 971 #endif // #if (BLE_EMB_PRESENT) 972 /// Max priority 973 RWIP_PRIO_MAX = 31, 974 }; 975 /// Default increment value definition 976 enum rwip_incr_dft 977 { 978 #if (BT_EMB_PRESENT) 979 /// ACL event default increment 980 RWIP_INCR_ACL_DFT = 1, 981 /// ACL event increment with activity 982 RWIP_INCR_ACL_ACT = 1, 983 /// ACL Role Switch event default increment 984 RWIP_INCR_ACL_RSW = 1, 985 /// ACL sniff event default increment 986 RWIP_INCR_ACL_SNIFF_DFT = 1, 987 /// ACL sniff transition event default increment 988 RWIP_INCR_ACL_SNIFF_TRANS = 1, 989 #if MAX_NB_SYNC 990 /// SCO event default increment 991 RWIP_INCR_SCO_DFT = 1, 992 #endif //MAX_NB_SYNC 993 /// Broadcast ACL event default increment 994 RWIP_INCR_BCST_DFT = 1, 995 /// Broadcast ACL event with LMP activity increment 996 RWIP_INCR_BCST_ACT = 1, 997 /// CSB RX event default increment 998 RWIP_INCR_CSB_RX_DFT = 1, 999 /// CSB TX event default increment 1000 RWIP_INCR_CSB_TX_DFT = 1, 1001 /// Inquiry event default increment 1002 RWIP_INCR_INQ_DFT = 1, 1003 /// Inquiry Scan event default increment 1004 RWIP_INCR_ISCAN_DFT = 1, 1005 /// Page event default increment 1006 RWIP_INCR_PAGE_DFT = 1, 1007 /// Page event default increment 1008 RWIP_INCR_PAGE_1ST_PKT = 2, 1009 /// Page first packet event default increment 1010 RWIP_INCR_PCA_DFT = 1, 1011 /// Page scan event default increment 1012 RWIP_INCR_PSCAN_DFT = 1, 1013 /// Page scan event increment increment when canceled 1014 RWIP_INCR_PSCAN_1ST_PKT = 1, 1015 /// Synchronization Scan event default increment 1016 RWIP_INCR_SSCAN_DFT = 1, 1017 /// Synchronization Train event default increment 1018 RWIP_INCR_STRAIN_DFT = 1, 1019 #endif //#if (BT_EMB_PRESENT) 1020 #if (BLE_EMB_PRESENT) 1021 /// Default increment for scanning events 1022 RWIP_INCR_SCAN_DFT = 1, 1023 /// Default increment for initiating events 1024 RWIP_INCR_INIT_DFT = 1, 1025 /// Default increment for master connect events 1026 RWIP_INCR_MCONNECT_DFT = 1, 1027 /// Default increment for slave connect events 1028 RWIP_INCR_SCONNECT_DFT = 1, 1029 /// Default increment for advertising events 1030 RWIP_INCR_ADV_DFT = 1, 1031 /// Default increment for advertising high duty cycle events 1032 RWIP_INCR_ADV_HDC_PRIO_DFT = 1, 1033 /// Default increment for resolvable private addresses renewal event 1034 RWIP_INCR_RPA_RENEW_DFT = 1, 1035 #endif // #if (BLE_EMB_PRESENT) 1036 }; 1037 #endif //#if (BLE_EMB_PRESENT || BT_EMB_PRESENT) 1038 /// @} BT Stack Configuration 1039 /// @} ROOT 1040 1041 #endif //RWIP_CONFIG_H_ 1042