1 /**
2 ******************************************************************************
3 * @file rtl8721d_syscfg.h
4 * @author
5 * @version V1.0.0
6 * @date 2016-05-17
7 * @brief This file contains all the functions prototypes for SYSCFG firmware
8 * library.
9 ******************************************************************************
10 * @attention
11 *
12 * This module is a confidential and proprietary property of RealTek and
13 * possession or use of this module requires written permission of RealTek.
14 *
15 * Copyright(c) 2015, Realtek Semiconductor Corporation. All rights reserved.
16 ******************************************************************************
17 */
18
19 #ifndef _RTL8710B_SYSCFG_H_
20 #define _RTL8710B_SYSCFG_H_
21
22 /** @addtogroup AmebaD_Platform
23 * @{
24 */
25
26 /** @defgroup SYSCFG
27 * @brief SYSCFG driver modules
28 * @{
29 */
30
31 /** @addtogroup SYSCFG
32 * @verbatim
33 *****************************************************************************************
34 * Introduction
35 *****************************************************************************************
36 * Used for system, user can not used it if not needed.
37 *
38 *****************************************************************************************
39 * REG_SYS_SYSTEM_CFG0 Introduction
40 *****************************************************************************************
41 *
42 * BIT[31] Trapped PKG_ENG_SEL value 0: normal package; 1: engineering mode
43 * BIT[30] CHIP_EN PIN input value
44 * BIT[27:24] BD info
45 * BIT[16] 1: Test chip; 0:MP
46 * BIT[11:8] Vendor ID
47 * BIT[7:4] Chip version
48 * BIT[3:0] Vendor ID defined in RF
49 *
50 *****************************************************************************************
51 * REG_LP_SYSTEM_CFG1 Introduction
52 *****************************************************************************************
53 *
54 * BIT[31:28] is BIT_SYSCFG_TRP_ICFG, value is load from following trap pin:
55 * ICFG[0]/ICFG[1]/ICFG[2]/ICFG[3] when trap pin TSET_MODE_SEL = 1
56 * BIT[27] is BIT_SYSCFG_TRP_BOOT_SEL
57 * 0: boot normal, 1: uart flash download
58 * value load from trap pin UART_DOWNLOAD_IMAGE
59 * BIT[25] is BIT_SYSCFG_TRP_SPSLDO_SEL, Trapped Selection for SPS
60 * 0: SWR mode; 1: LDO mode
61 * load from trap pin SPS_LDO_SEL
62 * BIT[8] BIT_SYS_XCLK_VLD Xtal Clock Stable, 1: Clock Stable
63 * BIT[0] BIT_SYSCFG_ALDN_STS 1: SYS CFG autoload done; 0; SYSCFG autoload not ready
64 *
65 *****************************************************************************************
66 * REG_LP_SYSTEM_CFG2 Introduction
67 *****************************************************************************************
68 *
69 * BIT[7:0] ROM Information
70 *
71 *
72 *****************************************************************************************
73 * trap pins
74 *****************************************************************************************
75 *
76 * GPIOA_0:
77 * TEST_MODE_SEL
78 * default PD
79 *
80 * GPIOA_3:
81 * SPS_LDO_SEL
82 * default PU, internal PU
83 * 0: SWR 1: LDO
84 * load to 0x1F4[25]
85 *
86 * GPIOA_30:
87 * UART_DOWNLOAD_IMAGE
88 * default PU
89 * load to 0x1F4[27]
90 *
91 *****************************************************************************************
92 * @endverbatim
93 */
94
95 /* Exported constants --------------------------------------------------------*/
96
97 /** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants
98 * @{
99 */
100
101 /** @defgroup SYSCFG_Bounding_Option_definitions
102 * @{
103 */
104 #define SYSCFG_BD_QFN32 ((u32)0x000000000)
105 #define SYSCFG_BD_QFN48_MCM_8MBFlash ((u32)0x000000001)
106 #define SYSCFG_BD_QFN48 ((u32)0x000000002)
107 #define SYSCFG_BD_QFN48_NEW ((u32)0x000000000)
108 #define SYSCFG_BD_QFN68 ((u32)0x000000007)
109 #define SYSCFG_BD_QFN68_NEW ((u32)0x000000005)
110 #define SYSCFG_BD_TFBGA_MCM_8761A ((u32)0x000000004)
111 /**
112 * @}
113 */
114
115 /** @defgroup SYSCFG_CUT_Version_definitions
116 * @{
117 */
118 #define SYSCFG_CUT_VERSION_A 0
119 #define SYSCFG_CUT_VERSION_B 1
120 /**
121 * @}
122 */
123
124 /**
125 * @}
126 */
127
128 /* Exported functions --------------------------------------------------------*/
129 /** @defgroup SYSCFG_Exported_Functions SYSCFG Exported Functions
130 * @{
131 */
132 _LONG_CALL_ u32 SYSCFG_GetChipInfo(void);
133 //_LONG_CALL_ u32 SYSCFG_CUTVersion(void);
134 _LONG_CALL_ u32 SYSCFG_TRP_LDOMode(void);
135 _LONG_CALL_ u32 SYSCFG_TRP_UARTImage(void);
136 _LONG_CALL_ u32 SYSCFG_TRP_ICFG(void);
137 _LONG_CALL_ u32 SYSCFG_ROMINFO_Get(void);
138 _LONG_CALL_ void SYSCFG_ROMINFO_Set(void);
139 /**
140 * @}
141 */
142
143 /* Registers Definitions --------------------------------------------------------*/
144
145 static inline u32
SYSCFG_CUTVersion(void)146 SYSCFG_CUTVersion(void)
147 {
148 u32 tmp = (HAL_READ32(0x48000000, 0x000C) >> 8) & 0xF; //get chip version from REG_AON_BOOT_REASON1
149
150 if(0 == tmp) {
151 return SYSCFG_CUT_VERSION_A; /*A-Cut*/
152 } else {
153 tmp = HAL_READ32(0x48000000, 0x03F0) & 0xF; //confirm chip version according to REG_LP_SYSTEM_CFG0
154 if(0 == tmp)
155 return SYSCFG_CUT_VERSION_B;
156 else
157 return tmp;
158 }
159 }
160
161 /** @} */
162
163 /**
164 * @}
165 */
166
167 /**
168 * @}
169 */
170
171 /* Other definations --------------------------------------------------------*/
172 /******************* Macro definition for TRP_ICFG ********************/
173 #define SYSCFG_TRP_ICFG_STOP_IN_ROMBOOT 2
174 #define SYSCFG_TRP_ICFG_FLASH_LOCATION 3 /* Ameba1 used, AmebaZ not use */
175 #endif //_RTL8710B_SYSCFG_H_
176 /******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
177