| /AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/include/ |
| A D | hal_platform.h | 33 #define __I volatile /*!< Defines 'read only' permissions */ macro
35 #define __I volatile const /*!< Defines 'read only' permissions */ macro
418 __I uint32_t SR; /*!< SSI status register, Address offset: 0x28 */
613 __I u32 LCDC_IRQ_RAW; /*!< LCDC RAW interrupt status Address offset: 0x28*/
662 __I uint32_t DATA; /*!< RAW Data */
680 __I uint32_t RSVD0; /*!< CAPTOUCH reserved register, Address offset: 0x1C */
684 __I uint32_t CT_ISR_RAW; /*!< CAPTOUCH Address offset: 0x28*/
686 __I uint32_t RSVD1; /*!< CAPTOUCH reserved register, Address offset: 0x2C */
721 __I u32 IR_RX_FIFO; /*!< IR RX FIFO register Address offset: 0x28 */
941 __I uint32_t SP_RX_DR; /*!< SPORT RX data register, Address offset: 0x10 */
[all …]
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| /AliOS-Things-master/hardware/chip/haas1000/drivers/platform/hal/ |
| A D | reg_uart.h | 13 __I uint32_t UARTRSR; // 0x004
17 __I uint32_t UARTFR; // 0x018
26 __I uint32_t UARTRIS; // 0x03C
27 __I uint32_t UARTMIS; // 0x040
31 __I uint32_t UARTPID0; // 0xFE0
32 __I uint32_t UARTPID1; // 0xFE4
33 __I uint32_t UARTPID2; // 0xFE8
34 __I uint32_t UARTPID3; // 0xFEC
35 __I uint32_t UARTPCID0; // 0xFF0
36 __I uint32_t UARTPCID1; // 0xFF4
[all …]
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| A D | reg_transq.h | 18 __I uint32_t LDONE_RIS; // 0x010
23 __I uint32_t LERR_RIS; // 0x018
27 __I uint32_t LDONE_MIS; // 0x020
28 __I uint32_t LERR_MIS; // 0x024
36 __I uint32_t RMT_RIS; // 0x200
42 __I uint32_t ADDR; // 0x230 + N * 8
43 __I uint32_t LEN; // 0x238 + N * 8
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| A D | reg_trng.h | 13 __I uint32_t RNG_ISR; // 0x104
16 __I uint32_t TRNG_VALID; //0x110
17 __I uint32_t EHR_DATA[6]; //0x114-0x128
21 __I uint32_t TRNG_DEBUG_CONTROL; //0x138
25 __I uint32_t TRNG_BUSY; //0x1b8
28 __I uint32_t RNG_BIST_CNTR[3]; //0x1e0-0x1e8
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| A D | reg_dma.h | 38 __I uint32_t INTSTAT; // 0x000 DMA Interrupt Status Register
39 … __I uint32_t INTTCSTAT; // 0x004 DMA Interrupt Terminal Count Request Status Register
41 __I uint32_t INTERRSTAT; // 0x00C DMA Interrupt Error Status Register
43 __I uint32_t RAWINTTCSTAT; // 0x014 DMA Raw Interrupt Terminal Count Status Register
44 __I uint32_t RAWINTERRSTAT; // 0x018 DMA Raw Error Interrupt Status Register
45 __I uint32_t ENBLDCHNS; // 0x01C DMA Enabled Channel Register
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| A D | reg_timer.h | 15 __I uint32_t Value; /* Offset: 0x004 (R/ ) Timer X Counter Current Value */
18 __I uint32_t RIS; /* Offset: 0x010 (R/ ) Timer X Raw Interrupt Status */
19 __I uint32_t MIS; /* Offset: 0x014 (R/ ) Timer X Masked Interrupt Status */
25 __I uint32_t ElapsedVal;
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| A D | reg_rtc.h | 12 __I uint32_t RTCDR; // 0x000
17 __I uint32_t RTCRIS; // 0x014
18 __I uint32_t RTCMIS; // 0x018
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| A D | reg_spi.h | 14 __I uint32_t SSPSR; //0x0000000C
17 __I uint32_t SSPRIS; //0x00000018
18 __I uint32_t SSPMIS; //0x0000001C
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| A D | plat_types.h | 204 #ifndef __I
206 #define __I volatile /*!< Defines 'read only' permissions */ macro
208 #define __I volatile const /*!< Defines 'read only' permissions */ macro
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| A D | reg_pwm.h | 12 __I uint32_t ID; // 0x000
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| A D | reg_xdma.h | 40 __I uint32_t INTSTAT; // Offset: 0xF0 DMA Interrupt Register
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| /AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis/ |
| A D | core_cm3.h | 181 #define __I volatile /*!< Defines 'read only' permissions */ macro
183 #define __I volatile const /*!< Defines 'read only' permissions */
598 …__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register …
898 …__I uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Regist…
902 __I uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
903 __I uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
904 __I uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
906 __I uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
907 __I uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
913 __I uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
[all …]
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| A D | core_cm4.h | 217 #define __I volatile /*!< Defines 'read only' permissions */ macro
219 #define __I volatile const /*!< Defines 'read only' permissions */
628 …__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register …
928 …__I uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Regist…
932 __I uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
933 __I uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
934 __I uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
936 __I uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
937 __I uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
943 __I uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
[all …]
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| A D | core_cm0plus.h | 174 #define __I volatile /*!< Defines 'read only' permissions */ macro
176 #define __I volatile const /*!< Defines 'read only' permissions */
318 …__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register …
436 …__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register …
483 …__I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register …
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| A D | core_cm0.h | 164 #define __I volatile /*!< Defines 'read only' permissions */ macro
166 #define __I volatile const /*!< Defines 'read only' permissions */
307 …__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register …
415 …__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register …
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| /AliOS-Things-master/hardware/chip/haas1000/drivers/platform/cmsis/inc/ |
| A D | core_cm0.h | 160 #define __I volatile /*!< Defines 'read only' permissions */ macro
162 #define __I volatile const /*!< Defines 'read only' permissions */
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| A D | core_cm1.h | 160 #define __I volatile /*!< Defines 'read only' permissions */ macro
162 #define __I volatile const /*!< Defines 'read only' permissions */
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| A D | core_sc000.h | 165 #define __I volatile /*!< Defines 'read only' permissions */ macro
167 #define __I volatile const /*!< Defines 'read only' permissions */
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| /AliOS-Things-master/components/csi/csi1/include/core/ |
| A D | core_ck807.h | 93 #define __I volatile /*!< Defines 'read only' permissions */ macro
95 #define __I volatile const /*!< Defines 'read only' permissions */
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| /AliOS-Things-master/components/csi/csi2/include/core/cmsis/ |
| A D | core_cm0.h | 160 #define __I volatile /*!< Defines 'read only' permissions */ macro
162 #define __I volatile const /*!< Defines 'read only' permissions */
|
| /AliOS-Things-master/components/csi/csi2/include/core/ |
| A D | core_ck807.h | 93 #define __I volatile /*!< Defines 'read only' permissions */ macro
95 #define __I volatile const /*!< Defines 'read only' permissions */
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| /AliOS-Things-master/components/py_engine/engine/lib/cmsis/inc/ |
| A D | core_cm0.h | 160 #define __I volatile /*!< Defines 'read only' permissions */ macro
162 #define __I volatile const /*!< Defines 'read only' permissions */
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| /AliOS-Things-master/components/csi/CMSIS/Core/Include/ |
| A D | core_cm0.h | 160 #define __I volatile /*!< Defines 'read only' permissions */ macro
162 #define __I volatile const /*!< Defines 'read only' permissions */
|
| /AliOS-Things-master/components/ai_agent/src/engine/tflite-micro/third_party/cmsis/CMSIS/Core/Include/ |
| A D | core_cm0.h | 160 #define __I volatile /*!< Defines 'read only' permissions */ macro
162 #define __I volatile const /*!< Defines 'read only' permissions */
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| /AliOS-Things-master/components/ai_agent/src/engine/tflite-micro/tensorflow/lite/micro/tools/make/downloads/cmsis/CMSIS/Core/Include/ |
| A D | core_cm0.h | 160 #define __I volatile /*!< Defines 'read only' permissions */ macro
162 #define __I volatile const /*!< Defines 'read only' permissions */
|