| /AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/include/ |
| A D | hal_platform.h | 37 #define __O volatile /*!< Defines 'write only' permissions */ macro
716 __O u32 IR_TX_FIFO; /*!< IR TX FIFO register, Address offset: 0x14 */
937 __O uint32_t SP_TX_DR; /*!< SPORT TX data register, Address offset: 0x00 */
973 __O uint32_t EGR; /*!< TIM event generation register, Address offset: 0x10 */
1134 __O uint32_t CRC_RST; /*!< CRC reset register, Address offset: 0x0000 */
1330 __O uint32_t CLEAR_TFR; /*!< Clear for IntTfr Interrupt, Address offset: 0x0338 */
1332 __O uint32_t CLEAR_BLOCK; /*!< Clear for IntBlock Interrupt, Address offset: 0x0340 */
1334 __O uint32_t CLEAR_SRC_TRAN; /*!< Clear for IntSrcTran Interrupt, Address offset: 0x0348 */
1338 __O uint32_t CLEAR_ERR; /*!< Clear for IntErr Interrupt, Address offset: 0x0358 */
1340 __O uint32_t StatusInt; /*!< Status for each interrupt type, Address offset: 0x0360 */
[all …]
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| /AliOS-Things-master/hardware/chip/haas1000/drivers/platform/hal/ |
| A D | reg_trng.h | 14 __O uint32_t RNG_ICR; // 0x108
23 __O uint32_t TRNG_SW_RESET; //0x140
26 __O uint32_t RST_BITS_COUNTER; //0x1bc
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| A D | reg_transq.h | 19 __O uint32_t LDONE_INTCLR; // 0x010
24 __O uint32_t LERR_INTCLR; // 0x018
37 __O uint32_t RMT_INTCLR; // 0x200
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| A D | reg_uart.h | 14 __O uint32_t UARTECR; // 0x004
28 __O uint32_t UARTICR; // 0x044
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| A D | reg_dma.h | 40 __O uint32_t INTTCCLR; // 0x008 DMA Interrupt Terminal Count Request Clear Register
42 __O uint32_t INTERRCLR; // 0x010 DMA Interrupt Error Clear Register
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| A D | reg_rtc.h | 19 __O uint32_t RTCICR; // 0x01C
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| A D | reg_timer.h | 17 __O uint32_t IntClr; /* Offset: 0x00C ( /W) Timer X Interrupt Clear */
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| A D | reg_spi.h | 19 __O uint32_t SSPICR; //0x00000020
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| A D | plat_types.h | 210 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| /AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis/ |
| A D | core_cm3.h | 185 #define __O volatile /*!< Defines 'write only' permissions */ macro
313 …__O uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Regist…
645 __O union
647 …__O uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit …
648 …__O uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit …
649 …__O uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit …
658 …__O uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register …
662 …__O uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register …
1138 …__O uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Regi…
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| A D | core_cm4.h | 221 #define __O volatile /*!< Defines 'write only' permissions */ macro
350 …__O uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Regist…
675 __O union
677 …__O uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit …
678 …__O uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit …
679 …__O uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit …
688 …__O uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register …
692 …__O uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register …
1274 …__O uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Regi…
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| A D | core_cm0.h | 168 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| A D | core_cm0plus.h | 178 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| /AliOS-Things-master/hardware/chip/haas1000/drivers/platform/cmsis/inc/ |
| A D | core_cm0.h | 164 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| A D | core_cm1.h | 164 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| A D | core_sc000.h | 169 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| /AliOS-Things-master/components/csi/csi1/include/core/ |
| A D | core_ck807.h | 97 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| A D | core_810.h | 97 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| /AliOS-Things-master/components/csi/csi2/include/core/cmsis/ |
| A D | core_cm0.h | 164 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| /AliOS-Things-master/components/csi/csi2/include/core/ |
| A D | core_ck807.h | 97 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| /AliOS-Things-master/components/py_engine/engine/lib/cmsis/inc/ |
| A D | core_cm0.h | 164 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| /AliOS-Things-master/components/csi/CMSIS/Core/Include/ |
| A D | core_cm0.h | 164 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| A D | core_sc000.h | 174 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| /AliOS-Things-master/components/ai_agent/src/engine/tflite-micro/third_party/cmsis/CMSIS/Core/Include/ |
| A D | core_cm0.h | 164 #define __O volatile /*!< Defines 'write only' permissions */ macro
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| /AliOS-Things-master/components/ai_agent/src/engine/tflite-micro/tensorflow/lite/micro/tools/make/downloads/cmsis/CMSIS/Core/Include/ |
| A D | core_cm0.h | 164 #define __O volatile /*!< Defines 'write only' permissions */ macro
|