1 /** 2 ****************************************************************************** 3 * @file rtl8721d_pmc.h 4 * @author 5 * @version V1.0.0 6 * @date 2016-05-17 7 * @brief This file provides firmware functions to manage the following 8 * functionalities of the soc power management circut: 9 * - wakeup timer 10 * - wakeup pin 11 * - sleep option 12 * - sleep mode 13 ****************************************************************************** 14 * @attention 15 * 16 * This module is a confidential and proprietary property of RealTek and 17 * possession or use of this module requires written permission of RealTek. 18 * 19 * Copyright(c) 2015, Realtek Semiconductor Corporation. All rights reserved. 20 ****************************************************************************** 21 */ 22 23 #ifndef _RTL8721D_PMC_H_ 24 #define _RTL8721D_PMC_H_ 25 26 /** @addtogroup AmebaD_Platform 27 * @{ 28 */ 29 30 /** @defgroup PMC 31 * @brief PMC driver modules 32 * @{ 33 */ 34 35 /** @addtogroup PMC 36 * @verbatim 37 ***************************************************************************************** 38 * Introduction 39 ***************************************************************************************** 40 * we support following soc power save functions: 41 * - sleep clock gating 42 * - sleep power gating 43 * - deep standby 44 * - deep sleep 45 * 46 ***************************************************************************************** 47 * sleep power gating 48 ***************************************************************************************** 49 * following functions can be used when power gating: 50 * -UART0/UART1 51 * -TIM4/TIM5 52 * -RTC 53 * -WIFI 54 * -SDIO 55 * -USB 56 * -I2C0/I2C1 57 * -ADC 58 * -GPIO 59 * -REGU timer 60 * -normal wakepin 61 * -ANA timer 62 * following functions will be closed when power gating: 63 * -UART2 LOGUART 64 * -TIM0-TIM3 65 * -SPIC flash 66 * 67 ***************************************************************************************** 68 * deep standby 69 ***************************************************************************************** 70 * following functions can be used when deep standby: 71 * -RTC 72 * -REGU timer 73 * -normal wakepin 74 * -ANA timer 75 * 76 ***************************************************************************************** 77 * deep sleep 78 ***************************************************************************************** 79 * following functions can be used when deep standby: 80 * -REGU timer 81 * -REGU wakepin 82 * 83 ***************************************************************************************** 84 * wakepin (A18/A5/A22/A23: mux normal wakepin and REGU wakepin) 85 ***************************************************************************************** 86 * normal wakepin: 87 * -SLP_CG 88 * -SLP_PG 89 * -STDBY 90 * REGU wakepin: 91 * -just used in DSLP (1.2V closed) 92 * -just support high acive, so this pin should pull low on your board 93 * 94 ***************************************************************************************** 95 ***************************************************************************************** 96 * SLP & SNZ power option 97 ***************************************************************************************** 98 * BIT_SYSON_PMOPT_SLP_EN_SWR & BIT_SYSON_PMOPT_SNZ_EN_SWR 99 * -we have two 1.2V LDO 100 * -BIG LDO: SWR mode or LDO mode (can config ) 101 * -LITTLE LDO: a little 1.2v LDO 102 * -BIT_SYSON_PMOPT_SLP_EN_SWR 103 * -ENABLE/DISABLE BIG LDO when SLP 104 * BIT_SYSON_PMOPT_SNZ_EN_SWR 105 * -ENABLE/DISABLE BIG LDO when SNZ, WIFI & ADC need open BIG LDO when SNZ 106 * 107 * BIT_SYSON_PMOPT_SLP_EN_PWM & BIT_SYSON_PMOPT_SNZ_EN_PWM 108 * -BIT_SYSON_PMOPT_SLP_EN_PWM 109 * -ENABLE/DISABLE LDO heavy loading current mode when SLP 110 * -BIT_SYSON_PMOPT_SNZ_EN_PWM 111 * -ENABLE/DISABLE heavy loading current mode when SNZ, WIFI & ADC need heavy loading when SNZ 112 * 113 * BIT_SYSON_PMOPT_SLP_XTAL_EN & BIT_SYSON_PMOPT_SNZ_XTAL_EN 114 * -WIFI and SOC both need XTAL when work, 115 * -but WIFI have individual option to control XTAL, so BIT_SYSON_PMOPT_SNZ_XTAL_EN not needed 116 * 117 * BIT_SYSON_PMOPT_SLP_SYSPLL_EN & BIT_SYSON_PMOPT_SNZ_SYSPLL_EN 118 * -WIFI and SOC both have individual PLL, here is SOC 500M PLL 119 * -So BIT_SYSON_PMOPT_SNZ_SYSPLL_EN not needed 120 * 121 * BIT_SYSON_SNFEVT_WIFI_MSK = 1 & BIT_SYSON_BYPASS_SNZ_SLP = 1 122 * - after OS suspend, platform will enter SNZ and close CPU, then platform enter sleep mode when WIFI 32K 123 * - BIT_SYSON_PMOPT_SNZ_EN_SOC should never open, or CPU will not close when platform will enter SNZ 124 * 125 * BIT_SYSON_SNFEVT_WIFI_MSK = 1 & BIT_SYSON_BYPASS_SNZ_SLP = 0 (not use this config) 126 * - after OS suspend, platform will enter sleep mode & close CPU after WIFI 32K 127 ***************************************************************************************** 128 * @endverbatim 129 */ 130 131 132 /* Exported constants --------------------------------------------------------*/ 133 134 /** @defgroup PMC_Exported_Constants PMC Exported Constants 135 * @{ 136 */ 137 138 /** @defgroup SOCPS_PS_Wakeup_Pin_definitions 139 * @{ 140 */ 141 #define WAKUP_0 ((u32)0x00000000)/*!< see aon_wakepin */ 142 #define WAKUP_1 ((u32)0x00000001)/*!< see aon_wakepin */ 143 #define WAKUP_2 ((u32)0x00000002)/*!< see aon_wakepin */ 144 #define WAKUP_3 ((u32)0x00000003)/*!< see aon_wakepin */ 145 /** 146 * @} 147 */ 148 149 /** 150 * @} 151 */ 152 153 /** 154 * @} 155 */ 156 157 /** 158 * @} 159 */ 160 161 typedef struct 162 { 163 u32 km0_config_wifi_enable; 164 u32 km0_enable_key_touch; 165 u32 km0_tickles_debug; /* open km0 tickles log, it will encrease power consumption */ 166 u32 km0_osc2m_close; /* just uart and normal ADC(2M/12=166K) use it, captouch ADC use 131K */ 167 u32 km0_pg_enable; 168 u32 km0_rtc_calibration; 169 u32 km0_audio_pad_enable; 170 171 /* debug */ 172 u32 km0_fw_idle_time; 173 u32 km0_clk_down_time; 174 u32 km0_rf_off_time; 175 u32 km0_gating_time; 176 u32 km0_rf_on_time; 177 u32 km0_wake_time; 178 u32 km0_dur1; 179 } PSCFG_TypeDef; 180 181 typedef struct 182 { 183 u32 wifi_app_ctrl_tdma; /* Enable APP Control TDMA */ 184 u32 wifi_ultra_low_power; /* Enable WIFI low power RX */ 185 u32 km4_cache_enable; /* km4 cache enable, carefull about SRAM data sync when use DMA */ 186 u32 km0_dslp_force_reinit; /* km0 reinit all when wake from DLPS */ 187 } WIFICFG_TypeDef; 188 189 extern PSCFG_TypeDef ps_config; 190 extern WIFICFG_TypeDef wifi_config; 191 192 void SOCPS_SetWakeEventAON(u32 Option, u32 NewStatus); 193 void SOCPS_SleepCG_RAM(VOID); 194 void SOCPS_SWR_PFMForce(u32 NewStatus); 195 int SOCPS_WakeEvent(void); 196 197 #endif //_RTL8721D_PMC_H_ 198 /******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/ 199