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Searched refs:mir (Results 1 – 13 of 13) sorted by relevance

/AliOS-Things-master/components/csi/csi1/include/core/
A Dcore_ck807.h756 MIR_Type mir; in csi_mmu_read_by_index() local
762 mir.b.Index = index; in csi_mmu_read_by_index()
763 __set_MIR(mir.w); in csi_mmu_read_by_index()
787 MIR_Type mir; in csi_mmu_invalid_tlb_by_index() local
789 mir.b.Index = index; in csi_mmu_invalid_tlb_by_index()
790 __set_MIR(mir.w); in csi_mmu_invalid_tlb_by_index()
A Dcore_810.h781 MIR_Type mir; in csi_mmu_read_by_index() local
787 mir.b.Index = index; in csi_mmu_read_by_index()
788 __set_MIR(mir.w); in csi_mmu_read_by_index()
813 MIR_Type mir; in csi_mmu_invalid_tlb_by_index() local
815 mir.b.Index = index; in csi_mmu_invalid_tlb_by_index()
816 __set_MIR(mir.w); in csi_mmu_invalid_tlb_by_index()
A Dcore_ck810.h762 MIR_Type mir; in csi_mmu_read_by_index() local
768 mir.b.Index = index; in csi_mmu_read_by_index()
769 __set_MIR(mir.w); in csi_mmu_read_by_index()
794 MIR_Type mir; in csi_mmu_invalid_tlb_by_index() local
796 mir.b.Index = index; in csi_mmu_invalid_tlb_by_index()
797 __set_MIR(mir.w); in csi_mmu_invalid_tlb_by_index()
A Dcore_ck610.h771 MIR_Type mir; in csi_mmu_read_by_index() local
777 mir.b.Index = index; in csi_mmu_read_by_index()
778 __set_MIR(mir.w); in csi_mmu_read_by_index()
803 MIR_Type mir; in csi_mmu_invalid_tlb_by_index() local
805 mir.b.Index = index; in csi_mmu_invalid_tlb_by_index()
806 __set_MIR(mir.w); in csi_mmu_invalid_tlb_by_index()
A Dcore_807.h1438 MIR_Type mir; in csi_mmu_read_by_index() local
1444 mir.b.Index = index; in csi_mmu_read_by_index()
1445 __set_MIR(mir.w); in csi_mmu_read_by_index()
1469 MIR_Type mir; in csi_mmu_invalid_tlb_by_index() local
1471 mir.b.Index = index; in csi_mmu_invalid_tlb_by_index()
1472 __set_MIR(mir.w); in csi_mmu_invalid_tlb_by_index()
A Dcsi_gcc.h901 __ALWAYS_STATIC_INLINE void __set_MIR(uint32_t mir) in __set_MIR() argument
905 __ASM volatile("cpwcr %0, cpcr0" : : "b"(mir)); in __set_MIR()
907 __ASM volatile("mtcr %0, cr<0, 15>" : : "r"(mir)); in __set_MIR()
/AliOS-Things-master/components/csi/csi2/include/core/
A Dcore_ck807.h756 MIR_Type mir; in csi_mmu_read_by_index() local
762 mir.b.Index = index; in csi_mmu_read_by_index()
763 __set_MIR(mir.w); in csi_mmu_read_by_index()
787 MIR_Type mir; in csi_mmu_invalid_tlb_by_index() local
789 mir.b.Index = index; in csi_mmu_invalid_tlb_by_index()
790 __set_MIR(mir.w); in csi_mmu_invalid_tlb_by_index()
A Dcore_810.h781 MIR_Type mir; in csi_mmu_read_by_index() local
787 mir.b.Index = index; in csi_mmu_read_by_index()
788 __set_MIR(mir.w); in csi_mmu_read_by_index()
813 MIR_Type mir; in csi_mmu_invalid_tlb_by_index() local
815 mir.b.Index = index; in csi_mmu_invalid_tlb_by_index()
816 __set_MIR(mir.w); in csi_mmu_invalid_tlb_by_index()
A Dcore_ck810.h762 MIR_Type mir; in csi_mmu_read_by_index() local
768 mir.b.Index = index; in csi_mmu_read_by_index()
769 __set_MIR(mir.w); in csi_mmu_read_by_index()
794 MIR_Type mir; in csi_mmu_invalid_tlb_by_index() local
796 mir.b.Index = index; in csi_mmu_invalid_tlb_by_index()
797 __set_MIR(mir.w); in csi_mmu_invalid_tlb_by_index()
A Dcore_ck610.h771 MIR_Type mir; in csi_mmu_read_by_index() local
777 mir.b.Index = index; in csi_mmu_read_by_index()
778 __set_MIR(mir.w); in csi_mmu_read_by_index()
803 MIR_Type mir; in csi_mmu_invalid_tlb_by_index() local
805 mir.b.Index = index; in csi_mmu_invalid_tlb_by_index()
806 __set_MIR(mir.w); in csi_mmu_invalid_tlb_by_index()
A Dcore_807.h1438 MIR_Type mir; in csi_mmu_read_by_index() local
1444 mir.b.Index = index; in csi_mmu_read_by_index()
1445 __set_MIR(mir.w); in csi_mmu_read_by_index()
1469 MIR_Type mir; in csi_mmu_invalid_tlb_by_index() local
1471 mir.b.Index = index; in csi_mmu_invalid_tlb_by_index()
1472 __set_MIR(mir.w); in csi_mmu_invalid_tlb_by_index()
A Dcsi_gcc.h921 __ALWAYS_STATIC_INLINE void __set_MIR(uint32_t mir) in __set_MIR() argument
925 __ASM volatile("cpwcr %0, cpcr0" : : "b"(mir)); in __set_MIR()
927 __ASM volatile("mtcr %0, cr<0, 15>" : : "r"(mir)); in __set_MIR()
/AliOS-Things-master/components/SDL2/include/
A DSDL_syswm.h272 } mir; member

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