Searched refs:DX0GCR5 (Results 1 – 2 of 2) sorted by relevance

/SCP-firmware-master/product/synquacer/module/synquacer_memc/src/
A D	ddr_init.c	793 REG_DDRPHY_CONFIG->DX0GCR5 = 0x2B2B2B2B; in ddr_init_phy0_mp() 795 REG_DDRPHY_CONFIG->DX0GCR5 = 0x3A3A3A3A; in ddr_init_phy0_mp() 799 REG_DDRPHY_CONFIG->DX0GCR5 = 0x32323232; in ddr_init_phy0_mp()
/SCP-firmware-master/product/synquacer/module/synquacer_memc/include/internal/
A D	reg_DDRPHY_CONFIG.h	467 uint32_t DX0GCR5; // 0x1C5 member

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