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Searched refs:DX6GCR5 (Results 1 – 2 of 2) sorted by relevance

/SCP-firmware-master/product/synquacer/module/synquacer_memc/src/
A Dddr_init.c895 REG_DDRPHY_CONFIG->DX6GCR5 = 0x2B2B2B2B; in ddr_init_phy0_mp()
897 REG_DDRPHY_CONFIG->DX6GCR5 = 0x3A3A3A3A; in ddr_init_phy0_mp()
901 REG_DDRPHY_CONFIG->DX6GCR5 = 0x32323232; in ddr_init_phy0_mp()
/SCP-firmware-master/product/synquacer/module/synquacer_memc/include/internal/
A Dreg_DDRPHY_CONFIG.h851 uint32_t DX6GCR5; // 0x345 member

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