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Searched refs:PERIPHERAL_BASE (Results 1 – 6 of 6) sorted by relevance

/SCP-firmware-master/product/juno/include/
A Dsystem_mmap.h16 #define PERIPHERAL_BASE UINT32_C(0x44000000) macro
27 #define WDOG_BASE (PERIPHERAL_BASE + 0x6000)
29 #define CONFIG_BASE (PERIPHERAL_BASE + 0x10000)
32 #define REFCLK_CNTCTL_BASE (PERIPHERAL_BASE)
33 #define REFCLK_CNTBASE0_BASE (PERIPHERAL_BASE + 0x1000)
34 #define S32K_CNTCONTROL_BASE (PERIPHERAL_BASE + 0x7000)
35 #define S32K_CNTCTL_BASE (PERIPHERAL_BASE + 0x8000)
36 #define S32K_CNTBASE0_BASE (PERIPHERAL_BASE + 0x9000)
37 #define CS_CNTCONTROL_BASE (PERIPHERAL_BASE + 0xA000)
39 #define PPU_BASE (PERIPHERAL_BASE + 0x20000)
/SCP-firmware-master/product/rcar/include/
A Dsystem_mmap.h14 #define BOARD_UART1_BASE (PERIPHERAL_BASE + 0xe68000)
15 #define BOARD_UART2_BASE (PERIPHERAL_BASE + 0xe88000)
17 #define SENSOR_SOC_TEMP1 (PERIPHERAL_BASE + 0x198000)
18 #define SENSOR_SOC_TEMP2 (PERIPHERAL_BASE + 0x1a0000)
19 #define SENSOR_SOC_TEMP3 (PERIPHERAL_BASE + 0x1a8000)
A Drcar_mmap.h19 #define PERIPHERAL_BASE UINT64_C(0xE6000000) macro
24 #define CPG_BASE (PERIPHERAL_BASE + 0x00150000)
25 #define MFIS_BASE (PERIPHERAL_BASE + 0x00260000)
/SCP-firmware-master/product/sgm776/include/
A Dsgm776_mmap.h17 #define PERIPHERAL_BASE UINT32_C(0x44000000) macro
28 #define REFCLK_CNTCTL_BASE (PERIPHERAL_BASE + 0x0000)
29 #define REFCLK_CNTBASE0_BASE (PERIPHERAL_BASE + 0x1000)
30 #define MHU_RECV_NS_BASE (PERIPHERAL_BASE + 0x2000)
31 #define MHU_SEND_NS_BASE (PERIPHERAL_BASE + 0x3000)
32 #define MHU_RECV_S_BASE (PERIPHERAL_BASE + 0x4000)
33 #define MHU_SEND_S_BASE (PERIPHERAL_BASE + 0x5000)
34 #define WDOG_BASE (PERIPHERAL_BASE + 0x6000)
35 #define S32K_CNTCONTROL_BASE (PERIPHERAL_BASE + 0x7000)
36 #define S32K_CNTCTL_BASE (PERIPHERAL_BASE + 0x8000)
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/SCP-firmware-master/product/sgm775/include/
A Dsgm775_mmap.h17 #define PERIPHERAL_BASE UINT32_C(0x44000000) macro
28 #define REFCLK_CNTCTL_BASE (PERIPHERAL_BASE + 0x0000)
29 #define REFCLK_CNTBASE0_BASE (PERIPHERAL_BASE + 0x1000)
30 #define WDOG_BASE (PERIPHERAL_BASE + 0x6000)
31 #define S32K_CNTCONTROL_BASE (PERIPHERAL_BASE + 0x7000)
32 #define S32K_CNTCTL_BASE (PERIPHERAL_BASE + 0x8000)
33 #define S32K_CNTBASE0_BASE (PERIPHERAL_BASE + 0x9000)
34 #define CS_CNTCONTROL_BASE (PERIPHERAL_BASE + 0xA000)
/SCP-firmware-master/product/rcar/module/rcar_reg_sensor/include/
A Dmod_rcar_reg_sensor.h53 #define GEN3_THERMAL_BASE (PERIPHERAL_BASE + 0x198000)

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