Searched refs:PIK_CLK_RATE_CLUS0 (Results 1 – 6 of 6) sorted by relevance
| /SCP-firmware-master/product/n1sdp/scp_ramfw/ |
| A D | config_clock.h | 38 #define PIK_CLK_RATE_CLUS0 (1600 * FWK_MHZ) macro
|
| A D | config_pik_clock.c | 176 .rate = PIK_CLK_RATE_CLUS0,
215 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_PCLK,
224 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_ATCLK,
233 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_GIC,
242 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_AMBACLK,
674 .initial_rate = PIK_CLK_RATE_CLUS0,
|
| /SCP-firmware-master/product/morello/scp_ramfw_fvp/ |
| A D | config_pik_clock.c | 175 .rate = PIK_CLK_RATE_CLUS0,
214 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_PCLK,
223 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_ATCLK,
232 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_GIC,
241 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_AMBACLK,
673 .initial_rate = PIK_CLK_RATE_CLUS0,
|
| A D | config_clock.h | 46 #define PIK_CLK_RATE_CLUS0 (1600 * FWK_MHZ) macro
|
| /SCP-firmware-master/product/morello/scp_ramfw_soc/ |
| A D | config_pik_clock.c | 170 .rate = PIK_CLK_RATE_CLUS0,
209 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_PCLK,
218 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_ATCLK,
227 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_GIC,
236 .divider = PIK_CLK_RATE_CLUS0 / PIK_CLK_RATE_CLUS0_AMBACLK,
687 .initial_rate = PIK_CLK_RATE_CLUS0,
|
| A D | config_clock.h | 47 #define PIK_CLK_RATE_CLUS0 (CLUS_CLOCK_MHZ * FWK_MHZ) macro
|
Completed in 9 milliseconds