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Searched refs:PIK_SCP (Results 1 – 25 of 29) sorted by relevance

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/SCP-firmware-master/product/sgi575/scp_ramfw/
A Dconfig_system_pll.c25 .status_reg = (void *)&PIK_SCP->PLL_STATUS[1],
37 .status_reg = (void *)&PIK_SCP->PLL_STATUS[1],
49 .status_reg = (void *)&PIK_SCP->PLL_STATUS[0],
61 .status_reg = (void *)&PIK_SCP->PLL_STATUS[0],
73 .status_reg = (void *)&PIK_SCP->PLL_STATUS[0],
A Dconfig_sds.c93 .payload = (void *)(&PIK_SCP->RESET_SYNDROME),
A Dconfig_pik_clock.c238 .control_reg = &PIK_SCP->CORECLK_CTRL,
239 .divsys_reg = &PIK_SCP->CORECLK_DIV1,
/SCP-firmware-master/product/rdn1e1/scp_ramfw/
A Dconfig_system_pll.c25 .status_reg = (void *)&PIK_SCP->PLL_STATUS[1],
37 .status_reg = (void *)&PIK_SCP->PLL_STATUS[1],
49 .status_reg = (void *)&PIK_SCP->PLL_STATUS[0],
61 .status_reg = (void *)&PIK_SCP->PLL_STATUS[0],
73 .status_reg = (void *)&PIK_SCP->PLL_STATUS[0],
A Dconfig_sds.c79 .payload = (void *)(&PIK_SCP->RESET_SYNDROME),
/SCP-firmware-master/product/sgm776/scp_romfw/
A Dconfig_system_pll.c26 .status_reg = (void *)&PIK_SCP->PLL_STATUS1,
39 .status_reg = (void *)&PIK_SCP->PLL_STATUS1,
52 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
65 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
A Dconfig_sds.c93 .payload = (const void *)&PIK_SCP->RESET_SYNDROME,
/SCP-firmware-master/product/sgm775/scp_ramfw/
A Dconfig_system_pll.c27 .status_reg = (void *)&PIK_SCP->PLL_STATUS1,
40 .status_reg = (void *)&PIK_SCP->PLL_STATUS1,
53 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
66 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
79 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
/SCP-firmware-master/product/sgm776/scp_ramfw/
A Dconfig_system_pll.c27 .status_reg = (void *)&PIK_SCP->PLL_STATUS1,
40 .status_reg = (void *)&PIK_SCP->PLL_STATUS1,
53 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
66 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
79 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
/SCP-firmware-master/product/sgm775/scp_romfw/
A Dconfig_system_pll.c27 .status_reg = (void *)&PIK_SCP->PLL_STATUS1,
40 .status_reg = (void *)&PIK_SCP->PLL_STATUS1,
53 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
78 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
A Dconfig_sds.c91 .payload = (void *)(&PIK_SCP->RESET_SYNDROME),
/SCP-firmware-master/product/sgi575/include/
A Dscp_sgi575_pik.h17 #define PIK_SCP ((struct pik_scp_reg *) SCP_PIK_SCP_BASE) macro
/SCP-firmware-master/product/rdn1e1/include/
A Dscp_rdn1e1_pik.h17 #define PIK_SCP ((struct pik_scp_reg *) SCP_PIK_SCP_BASE) macro
/SCP-firmware-master/product/n1sdp/include/
A Dn1sdp_scp_pik.h19 #define PIK_SCP ((struct pik_scp_reg *)SCP_PIK_SCP_BASE) macro
/SCP-firmware-master/product/morello/include/
A Dmorello_scp_pik.h21 #define PIK_SCP ((struct pik_scp_reg *)SCP_PIK_SCP_BASE) macro
/SCP-firmware-master/product/sgm775/include/
A Dsgm775_pik.h25 #define PIK_SCP ((struct pik_scp_reg *) PIK_SCP_BASE) macro
/SCP-firmware-master/product/sgm776/include/
A Dsgm776_pik.h25 #define PIK_SCP ((struct pik_scp_reg *) PIK_SCP_BASE) macro
/SCP-firmware-master/product/synquacer/module/synquacer_rom/src/
A Dsynquacer_init.c52 while ((PIK_SCP->PLL_STATUS[1] & pll_mask) != pll_mask || in fw_clock_pll_init()
53 (PIK_SCP->PLL_STATUS[9] & pll_mask) != pll_mask) in fw_clock_pll_init()
61 while ((PIK_SCP->PLL_STATUS[0] & pll_mask) != pll_mask) in pll_init()
/SCP-firmware-master/product/synquacer/scp_romfw/
A Dconfig_synquacer_pik_clock.c122 .control_reg = &PIK_SCP->CORECLK_CNTRL,
123 .divsys_reg = &PIK_SCP->CORECLK_DIV1,
134 .control_reg = &PIK_SCP->ACLK_CNTRL,
135 .divsys_reg = &PIK_SCP->ACLK_DIV1,
/SCP-firmware-master/product/synquacer/include/
A Dsynquacer_pik.h48 #define PIK_SCP ((pik_scp_reg_t *)PIK_SCP_BASE) macro
/SCP-firmware-master/product/morello/module/morello_system/src/
A Dmod_morello_system.c146 uint32_t status = PIK_SCP->CPU_PPU_INT_STATUS[0]; in ppu_cores_isr()
163 uint32_t status = PIK_SCP->CLUS_PPU_INT_STATUS; in ppu_clusters_isr()
247 PIK_SCP->ADDR_TRANS = addr_trans_reg; in morello_system_enable_ap_memory_access()
255 PIK_SCP->ADDR_TRANS &= ~ADDR_TRANS_EN; in morello_system_disable_ap_memory_access()
/SCP-firmware-master/product/morello/scp_ramfw_soc/
A Dconfig_sds.c76 .payload = (void *)(&PIK_SCP->RESET_SYNDROME),
/SCP-firmware-master/product/n1sdp/module/n1sdp_system/src/
A Dmod_n1sdp_system.c152 uint32_t status = PIK_SCP->CPU_PPU_INT_STATUS[0]; in ppu_cores_isr()
170 uint32_t status = PIK_SCP->CLUS_PPU_INT_STATUS; in ppu_clusters_isr()
252 PIK_SCP->ADDR_TRANS = addr_trans_reg; in n1sdp_system_enable_ap_memory_access()
260 PIK_SCP->ADDR_TRANS &= ~ADDR_TRANS_EN; in n1sdp_system_disable_ap_memory_access()
/SCP-firmware-master/product/n1sdp/scp_ramfw/
A Dconfig_sds.c79 .payload = (void *)(&PIK_SCP->RESET_SYNDROME),
/SCP-firmware-master/product/morello/scp_ramfw_fvp/
A Dconfig_sds.c82 .payload = (void *)(&PIK_SCP->RESET_SYNDROME),

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