Searched refs:RCAR_GICD_BASE (Results 1 – 2 of 2) sorted by relevance
| /SCP-firmware-master/arch/arm/armv8-a/src/ |
| A D | arch_gic.c | 346 RCAR_GICD_BASE, in gic_init()
349 gicd_set_isenabler(RCAR_GICD_BASE, (unsigned int)VIRTUAL_TIMER_IRQ); in gic_init()
351 RCAR_GICD_BASE, in gic_init()
354 gicd_set_isenabler(RCAR_GICD_BASE, (unsigned int)NS_PHYSICAL_TIMER_IRQ); in gic_init()
377 *enabled = (bool)gicd_get_isenabler(RCAR_GICD_BASE, interrupt); in is_enabled()
387 gicd_set_isenabler(RCAR_GICD_BASE, interrupt); in enable()
397 gicd_set_icenabler(RCAR_GICD_BASE, interrupt); in disable()
411 ((gicd_read_ispendr(RCAR_GICD_BASE, interrupt) & (1 << bit)) ? true : in is_pending()
425 gicd_write_ispendr(RCAR_GICD_BASE, interrupt, 1U << bit); in set_pending()
438 gicd_write_icpendr(RCAR_GICD_BASE, interrupt, 1U << bit); in clear_pending()
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| /SCP-firmware-master/arch/arm/armv8-a/include/ |
| A D | arch_gic.h | 125 #define RCAR_GICD_BASE U(0xF1010000) macro
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