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Searched refs:REG_DDRPHY_CONFIG (Results 1 – 1 of 1) sorted by relevance

/SCP-firmware-master/product/synquacer/module/synquacer_memc/src/
A Dddr_init.c942 REG_DDRPHY_CONFIG->MR0 = (REG_DDRPHY_CONFIG->MR0 & 0xFFFFFF8B) | in ddr_init_phy0_mp()
944 REG_DDRPHY_CONFIG->MR5 = (REG_DDRPHY_CONFIG->MR5 & 0xFFFFE3FF) | 0x00001800; in ddr_init_phy0_mp()
950 REG_DDRPHY_CONFIG->MR2 = (REG_DDRPHY_CONFIG->MR2 & 0xFFFFEFFF) | 0x00001000; in ddr_init_phy0_mp()
954 REG_DDRPHY_CONFIG->MR5 = (REG_DDRPHY_CONFIG->MR5 & 0xFFFFFFF8) | 0x00000001; in ddr_init_phy0_mp()
1018 REG_DDRPHY_CONFIG->PIR = (REG_DDRPHY_CONFIG->PIR & 0xFFF7FE7E) | in ddr_init_sdram_mp()
1048 REG_DDRPHY_CONFIG->SCHCR1 = (REG_DDRPHY_CONFIG->SCHCR1 & 0xF000000F) | in ddr_init_sdram_mp()
1051 REG_DDRPHY_CONFIG->SCHCR0 = (REG_DDRPHY_CONFIG->SCHCR0 & 0xFFFFFFF0) | in ddr_init_sdram_mp()
1064 REG_DDRPHY_CONFIG->SCHCR1 = (REG_DDRPHY_CONFIG->SCHCR1 & 0xF000000F) | in ddr_init_sdram_mp()
1067 REG_DDRPHY_CONFIG->SCHCR0 = (REG_DDRPHY_CONFIG->SCHCR0 & 0xFFFFFFF0) | in ddr_init_sdram_mp()
1080 REG_DDRPHY_CONFIG->SCHCR1 = (REG_DDRPHY_CONFIG->SCHCR1 & 0xF000000F) | in ddr_init_sdram_mp()
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