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Searched refs:SCHCR0 (Results 1 – 2 of 2) sorted by relevance

/SCP-firmware-master/product/synquacer/module/synquacer_memc/src/
A Dddr_init.c1044 REG_DDRPHY_CONFIG->SCHCR0 = in ddr_init_sdram_mp()
1045 (REG_DDRPHY_CONFIG->SCHCR0 & 0xFFFFFF0F) | 0x00000010; // [7:4]CMD in ddr_init_sdram_mp()
1051 REG_DDRPHY_CONFIG->SCHCR0 = (REG_DDRPHY_CONFIG->SCHCR0 & 0xFFFFFFF0) | in ddr_init_sdram_mp()
1058 REG_DDRPHY_CONFIG->SCHCR0 = in ddr_init_sdram_mp()
1059 (REG_DDRPHY_CONFIG->SCHCR0 & 0xFFFFFFF0) | in ddr_init_sdram_mp()
1067 REG_DDRPHY_CONFIG->SCHCR0 = (REG_DDRPHY_CONFIG->SCHCR0 & 0xFFFFFFF0) | in ddr_init_sdram_mp()
1074 REG_DDRPHY_CONFIG->SCHCR0 = in ddr_init_sdram_mp()
1075 (REG_DDRPHY_CONFIG->SCHCR0 & 0xFFFFFFF0) | in ddr_init_sdram_mp()
1083 REG_DDRPHY_CONFIG->SCHCR0 = (REG_DDRPHY_CONFIG->SCHCR0 & 0xFFFFFFF0) | in ddr_init_sdram_mp()
1090 REG_DDRPHY_CONFIG->SCHCR0 = in ddr_init_sdram_mp()
[all …]
/SCP-firmware-master/product/synquacer/module/synquacer_memc/include/internal/
A Dreg_DDRPHY_CONFIG.h104 uint32_t SCHCR0; // 0x05A member

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