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Searched refs:UARTCLK_DIV1 (Results 1 – 22 of 22) sorted by relevance

/SCP-firmware-master/product/sgi575/include/
A Dsgi575_pik_system.h51 FWK_RW uint32_t UARTCLK_DIV1; member
/SCP-firmware-master/product/rdn1e1/include/
A Drdn1e1_pik_system.h51 FWK_RW uint32_t UARTCLK_DIV1; member
/SCP-firmware-master/product/n1sdp/include/
A Dn1sdp_pik_system.h51 FWK_RW uint32_t UARTCLK_DIV1; member
/SCP-firmware-master/product/rdv1/include/
A Dsystem_pik.h53 FWK_RW uint32_t UARTCLK_DIV1; member
/SCP-firmware-master/product/rdv1mc/include/
A Dsystem_pik.h53 FWK_RW uint32_t UARTCLK_DIV1; member
/SCP-firmware-master/product/tc0/include/
A Dsystem_pik.h53 FWK_RW uint32_t UARTCLK_DIV1; member
/SCP-firmware-master/product/tc1/include/
A Dsystem_pik.h53 FWK_RW uint32_t UARTCLK_DIV1; member
/SCP-firmware-master/product/tc2/include/
A Dsystem_pik.h53 FWK_RW uint32_t UARTCLK_DIV1; member
/SCP-firmware-master/product/morello/include/
A Dmorello_pik_system.h51 FWK_RW uint32_t UARTCLK_DIV1; member
/SCP-firmware-master/product/synquacer/include/
A Dpik_system.h39 FWK_RW uint32_t UARTCLK_DIV1; member
/SCP-firmware-master/product/tc0/scp_romfw/
A Dconfig_pik_clock.c171 .divsys_reg = &SYSTEM_PIK_PTR->UARTCLK_DIV1,
/SCP-firmware-master/product/rdv1mc/scp_ramfw/
A Dconfig_pik_clock.c194 .divsys_reg = &SYSTEM_PIK_PTR->UARTCLK_DIV1,
/SCP-firmware-master/product/rdv1/scp_ramfw/
A Dconfig_pik_clock.c206 .divsys_reg = &SYSTEM_PIK_PTR->UARTCLK_DIV1,
/SCP-firmware-master/product/synquacer/scp_romfw/
A Dconfig_synquacer_pik_clock.c219 .divsys_reg = &PIK_SYSTEM->UARTCLK_DIV1,
/SCP-firmware-master/product/tc0/scp_ramfw/
A Dconfig_pik_clock.c236 .divsys_reg = &SYSTEM_PIK_PTR->UARTCLK_DIV1,
/SCP-firmware-master/product/tc1/scp_ramfw/
A Dconfig_pik_clock.c237 .divsys_reg = &SYSTEM_PIK_PTR->UARTCLK_DIV1,
/SCP-firmware-master/product/tc2/scp_ramfw/
A Dconfig_pik_clock.c237 .divsys_reg = &SYSTEM_PIK_PTR->UARTCLK_DIV1,
/SCP-firmware-master/product/sgi575/scp_ramfw/
A Dconfig_pik_clock.c287 .divsys_reg = &PIK_SYSTEM->UARTCLK_DIV1,
/SCP-firmware-master/product/rdn1e1/scp_ramfw/
A Dconfig_pik_clock.c287 .divsys_reg = &PIK_SYSTEM->UARTCLK_DIV1,
/SCP-firmware-master/product/morello/scp_ramfw_fvp/
A Dconfig_pik_clock.c914 .divsys_reg = &PIK_SYSTEM->UARTCLK_DIV1,
/SCP-firmware-master/product/morello/scp_ramfw_soc/
A Dconfig_pik_clock.c954 .divsys_reg = &PIK_SYSTEM->UARTCLK_DIV1,
/SCP-firmware-master/product/n1sdp/scp_ramfw/
A Dconfig_pik_clock.c915 .divsys_reg = &PIK_SYSTEM->UARTCLK_DIV1,

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