| /SCP-firmware-master/product/optee-stm32mp1/module/stm32_pmic_regu/src/ |
| A D | mod_stm32_pmic_regu.c | 223 int32_t *min, int32_t *max) in find_bound_uv() argument
227 fwk_assert((count == 0 || levels != NULL) && min != NULL && max != NULL); in find_bound_uv()
229 *min = INT32_MAX; in find_bound_uv()
233 if (*min > levels[n]) { in find_bound_uv()
234 *min = levels[n]; in find_bound_uv()
242 *min *= 1000; in find_bound_uv()
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| /SCP-firmware-master/module/optee/clock/src/ |
| A D | mod_optee_clock.c | 185 range->min = 0; in get_range()
194 range->min = clk_get_rate(ctx->clk); in get_range()
195 range->max = range->min; in get_range()
203 range->min = UINT64_MAX; in get_range()
214 } else if (rate < range->min) { in get_range()
215 range->min = rate; in get_range()
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| /SCP-firmware-master/product/rcar/module/rcar_clock/src/ |
| A D | mod_rcar_clock.c | 536 mult = min(mult, 108U); in pll0_clk_round_rate()
569 stc_val = min(stc_val, 108U); in pll0_clk_set_rate()
593 mult = min(mult, 78U); in pll2_clk_round_rate()
626 stc_val = min(stc_val, 78U); in pll2_clk_set_rate()
658 mult = min(mult, 32U); in z_clk_round_rate()
699 mult = min(mult, 32U); in z_clk_set_rate()
755 mult = min(mult, 32U); in z2_clk_round_rate()
795 mult = min(mult, 32U); in z2_clk_set_rate()
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| /SCP-firmware-master/product/rcar/module/rcar_clock/include/ |
| A D | mod_rcar_clock.h | 345 #define min(x, y) \ macro
359 #define clamp(val, lo, hi) min((__typeof__(val))max(val, lo), hi)
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| /SCP-firmware-master/product/morello/module/dmc_bing/src/ |
| A D | morello_ddr_phy.c | 51 uint16_t min; member
339 best_wrdq_eyes[slice][bit].min = DELAY_MAX; in write_eye_detect_single_rank()
394 wrdq_eyes[slice][bit].min = DELAY_MAX; in write_eye_detect_single_rank()
506 wrdq_eyes[slice][bit].min) { in write_eye_detect_single_rank()
507 wrdq_eyes[slice][bit].min = in write_eye_detect_single_rank()
519 (wrdq_eyes[slice][bit].min != DELAY_MAX)) { in write_eye_detect_single_rank()
546 eye->width = eye->max - eye->min; in write_eye_detect_single_rank()
551 eye->mid = (eye->min + eye->max) / 2; in write_eye_detect_single_rank()
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| /SCP-firmware-master/module/clock/include/ |
| A D | mod_clock.h | 212 uint64_t min; member
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| /SCP-firmware-master/product/n1sdp/module/n1sdp_ddr_phy/src/ |
| A D | mod_n1sdp_ddr_phy.c | 37 uint16_t min; member
411 best_wrdq_eyes[slice][bit].min = DELAY_MAX; in write_eye_detect_single_rank()
468 wrdq_eyes[slice][bit].min = DELAY_MAX; in write_eye_detect_single_rank()
583 wrdq_eyes[slice][bit].min) { in write_eye_detect_single_rank()
584 wrdq_eyes[slice][bit].min = in write_eye_detect_single_rank()
596 (wrdq_eyes[slice][bit].min != DELAY_MAX)) { in write_eye_detect_single_rank()
623 eye->width = eye->max - eye->min; in write_eye_detect_single_rank()
628 eye->mid = (eye->min + eye->max) / 2; in write_eye_detect_single_rank()
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| /SCP-firmware-master/product/rcar/module/rcar_sd_clock/src/ |
| A D | mod_rcar_sd_clock.c | 202 range->min = ctx->rate_table[0]; in sd_clock_get_range()
207 range->min = ctx->rate_table[0]; in sd_clock_get_range()
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| /SCP-firmware-master/module/mock_clock/src/ |
| A D | mod_mock_clock.c | 168 range->min = ctx->config->rate_table[0].rate; in mod_mock_clock_get_range()
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| /SCP-firmware-master/module/system_pll/src/ |
| A D | mod_system_pll.c | 209 range->min = ctx->config->min_rate; in system_pll_get_range()
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| /SCP-firmware-master/product/morello/module/morello_pll/src/ |
| A D | mod_morello_pll.c | 254 range->min = MOD_MORELLO_PLL_RATE_MIN; in morello_pll_get_range()
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| /SCP-firmware-master/product/n1sdp/module/n1sdp_pll/src/ |
| A D | mod_n1sdp_pll.c | 234 range->min = MOD_N1SDP_PLL_RATE_MIN; in n1sdp_pll_get_range()
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| /SCP-firmware-master/module/scmi_perf/src/ |
| A D | perf_plugins_handler.c | 99 static inline bool are_limits_valid(uint32_t min, uint32_t max) in are_limits_valid() argument
101 return (max > min); in are_limits_valid()
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| /SCP-firmware-master/product/juno/module/juno_hdlcd/src/ |
| A D | mod_juno_hdlcd.c | 322 range->min = ctx->config->min_rate; in juno_hdlcd_get_range()
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| /SCP-firmware-master/module/css_clock/src/ |
| A D | mod_css_clock.c | 239 range->min = ctx->config->rate_table[0].rate; in css_clock_get_range()
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| /SCP-firmware-master/product/juno/module/juno_cdcel937/src/ |
| A D | mod_juno_cdcel937.c | 818 range->min = ctx->config->lookup_table[0].rate_hz; in juno_cdcel937_get_range()
822 range->min = ctx->config->min_rate; in juno_cdcel937_get_range()
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| /SCP-firmware-master/product/juno/module/juno_soc_clock_ram/src/ |
| A D | mod_juno_soc_clock_ram.c | 478 range->min = ctx->config->rate_table[0].rate; in juno_soc_clock_get_range()
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| /SCP-firmware-master/product/synquacer/module/synquacer_pik_clock/src/ |
| A D | mod_synquacer_pik_clock.c | 488 range->min = ctx->config->rate_table[0].rate; in pik_clock_get_range()
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| /SCP-firmware-master/module/pik_clock/src/ |
| A D | mod_pik_clock.c | 476 range->min = ctx->config->rate_table[0].rate; in pik_clock_get_range()
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| /SCP-firmware-master/module/scmi_clock/src/ |
| A D | mod_scmi_clock.c | 1356 clock_range[0].low = (uint32_t)info.range.min; in scmi_clock_describe_rates_handler()
1357 clock_range[0].high = (uint32_t)(info.range.min >> 32); in scmi_clock_describe_rates_handler()
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| /SCP-firmware-master/doc/media/ |
| A D | style.css | 180 min-height: 13px;
|