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Searched refs:ppu (Results 1 – 25 of 97) sorted by relevance

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/SCP-firmware-master/module/ppu_v1/src/
A Dppu_v1.c35 fwk_assert(ppu != NULL); in ppu_v1_init()
38 ppu->IESR = 0; in ppu_v1_init()
41 ppu->IMR = PPU_V1_IMR_MASK; in ppu_v1_init()
53 fwk_assert(ppu != NULL); in ppu_v1_request_power_mode()
63 struct ppu_v1_reg *ppu, in ppu_v1_set_power_mode() argument
74 while ((ppu->PWSR & in ppu_v1_set_power_mode()
80 params.reg = ppu; in ppu_v1_set_power_mode()
95 fwk_assert(ppu != NULL); in ppu_v1_request_operating_mode()
109 fwk_assert(ppu != NULL); in ppu_v1_opmode_dynamic_enable()
200 return (ppu->DISR & in ppu_v1_is_power_devactive_high()
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A Dppu_v1.h246 void ppu_v1_init(struct ppu_v1_reg *ppu);
254 struct ppu_v1_reg *ppu,
261 int ppu_v1_request_power_mode(struct ppu_v1_reg *ppu,
279 void ppu_v1_dynamic_enable(struct ppu_v1_reg *ppu,
285 void ppu_v1_lock_off_enable(struct ppu_v1_reg *ppu);
290 void ppu_v1_lock_off_disable(struct ppu_v1_reg *ppu);
315 bool ppu_v1_is_dynamic_enabled(struct ppu_v1_reg *ppu);
320 bool ppu_v1_is_locked(struct ppu_v1_reg *ppu);
337 void ppu_v1_off_unlock(struct ppu_v1_reg *ppu);
343 void ppu_v1_disable_devactive(struct ppu_v1_reg *ppu);
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A Dmod_ppu_v1.c209 struct ppu_v1_reg *ppu = pd_ctx->ppu; in ppu_v1_core_pd_init() local
212 ppu_v1_init(ppu); in ppu_v1_core_pd_init()
234 ppu = pd_ctx->ppu; in ppu_v1_core_pd_set_state()
307 ppu = pd_ctx->ppu; in ppu_v1_core_pd_prepare_for_system_suspend()
323 ppu = pd_ctx->ppu; in core_pd_ppu_interrupt_handler()
434 ppu = pd_ctx->ppu; in cluster_off()
457 ppu = pd_ctx->ppu; in cluster_on()
480 struct ppu_v1_reg *ppu = pd_ctx->ppu; in ppu_v1_cluster_pd_init() local
483 ppu_v1_init(ppu); in ppu_v1_cluster_pd_init()
544 ppu = pd_ctx->ppu; in cluster_pd_ppu_interrupt_handler()
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/SCP-firmware-master/product/synquacer/module/ppu_v0_synquacer/src/
A Dppu_v0.c15 void ppu_v0_init(struct ppu_v0_reg *ppu) in ppu_v0_init() argument
17 fwk_assert(ppu != NULL); in ppu_v0_init()
20 ppu->IESR = 0; in ppu_v0_init()
23 ppu->IMR = PPU_V0_IMR_MASK; in ppu_v0_init()
26 ppu->ISR = PPU_V0_ISR_MASK; in ppu_v0_init()
32 fwk_assert(ppu != NULL); in ppu_v0_request_power_mode()
37 ppu->POWER_POLICY = power_policy | mode; in ppu_v0_request_power_mode()
42 int ppu_v0_set_power_mode(struct ppu_v0_reg *ppu, enum ppu_v0_mode mode) in ppu_v0_set_power_mode() argument
45 fwk_assert(ppu != NULL); in ppu_v0_set_power_mode()
47 status = ppu_v0_request_power_mode(ppu, mode); in ppu_v0_set_power_mode()
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A Dmod_ppu_v0.c37 struct ppu_v0_reg *ppu; member
84 ppu_v0_get_power_mode(ppu, &ppu_mode); in get_state()
100 ppu_v0_init(pd_ctx->ppu); in pd_init()
114 (void *)pd_ctx->ppu, in pd_set_state()
119 ppu_v0_set_power_mode(pd_ctx->ppu, PPU_V0_MODE_ON); in pd_set_state()
125 (void *)pd_ctx->ppu, in pd_set_state()
138 ppu_v0_set_power_mode(pd_ctx->ppu, PPU_V0_MODE_OFF); in pd_set_state()
144 (void *)pd_ctx->ppu, in pd_set_state()
166 return get_state(pd_ctx->ppu, state); in pd_get_state()
199 ppu_v0_request_power_mode(pd_ctx->ppu, PPU_V0_MODE_OFF); in ppu_v0_prepare_core_for_system_suspend()
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/SCP-firmware-master/module/ppu_v0/src/
A Dppu_v0.c34 fwk_assert(ppu != NULL); in ppu_v0_init()
37 ppu->IESR = 0; in ppu_v0_init()
40 ppu->IMR = PPU_V0_IMR_MASK; in ppu_v0_init()
43 ppu->ISR = PPU_V0_ISR_MASK; in ppu_v0_init()
49 fwk_assert(ppu != NULL); in ppu_v0_request_power_mode()
52 power_policy = ppu->POWER_POLICY & in ppu_v0_request_power_mode()
60 struct ppu_v0_reg *ppu, in ppu_v0_set_power_mode() argument
65 fwk_assert(ppu != NULL); in ppu_v0_set_power_mode()
72 while ((ppu->POWER_STATUS & in ppu_v0_set_power_mode()
77 params.reg = ppu; in ppu_v0_set_power_mode()
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A Dmod_ppu_v0.c38 struct ppu_v0_reg *ppu; member
79 static int get_state(struct ppu_v0_reg *ppu, unsigned int *state) in get_state() argument
87 ppu_v0_get_power_mode(ppu, &ppu_mode); in get_state()
101 ppu_v0_init(pd_ctx->ppu); in pd_init()
117 ppu_v0_set_power_mode(pd_ctx->ppu, PPU_V0_MODE_ON, pd_ctx->timer_ctx); in pd_set_state()
124 ppu_v0_set_power_mode(pd_ctx->ppu, PPU_V0_MODE_OFF, pd_ctx->timer_ctx); in pd_set_state()
144 return get_state(pd_ctx->ppu, state); in pd_get_state()
156 ppu_v0_set_power_mode(pd_ctx->ppu, PPU_V0_MODE_OFF, pd_ctx->timer_ctx); in pd_reset()
159 pd_ctx->ppu, PPU_V0_MODE_ON, pd_ctx->timer_ctx); in pd_reset()
194 pd_ctx->ppu = (struct ppu_v0_reg *)(config->ppu.reg_base); in ppu_v0_pd_init()
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/SCP-firmware-master/product/sgm775/scp_ramfw/
A Dconfig_ppu_v0.c28 .ppu.reg_base = PPU_DEBUG_BASE,
29 .ppu.irq = PPU_DEBUG_IRQ
36 .ppu.reg_base = PPU_DPU0_BASE,
37 .ppu.irq = PPU_DPU0_IRQ,
45 .ppu.reg_base = PPU_DPU1_BASE,
46 .ppu.irq = PPU_DPU1_IRQ,
54 .ppu.reg_base = PPU_GPU_BASE,
55 .ppu.irq = PPU_GPU_IRQ,
64 .ppu.irq = PPU_VPU_IRQ,
73 .ppu.irq = PPU_SYS0_IRQ
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/SCP-firmware-master/product/sgm776/scp_ramfw/
A Dconfig_ppu_v1.c58 .ppu.reg_base = PPU_DEBUG_BASE,
59 .ppu.irq = PPU_DEBUG_IRQ,
67 .ppu.reg_base = PPU_DPU_BASE,
68 .ppu.irq = PPU_DPU_IRQ,
77 .ppu.reg_base = PPU_GPU_BASE,
78 .ppu.irq = PPU_GPU_IRQ,
87 .ppu.reg_base = PPU_VPU_BASE,
88 .ppu.irq = PPU_VPU_IRQ,
98 .ppu.irq = PPU_SYS0_IRQ,
107 .ppu.irq = PPU_SYS1_IRQ,
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/SCP-firmware-master/product/optee-fvp/fw/
A Dconfig_mock_ppu.c27 .ppu.reg_base = (uintptr_t)vppu_regcluster,
34 .ppu.reg_base = (uintptr_t)vppu_regcluster,
41 .ppu.reg_base = (uintptr_t)vppu_regcluster,
69 .ppu.reg_base = (uintptr_t)vppu_regdbg,
76 .ppu.reg_base = (uintptr_t)vppu_regdpu0,
84 .ppu.reg_base = (uintptr_t)vppu_regdpu1,
92 .ppu.reg_base = (uintptr_t)vppu_reggpu,
100 .ppu.reg_base = (uintptr_t)vppu_regvpu,
108 .ppu.reg_base = (uintptr_t)vppu_regsys0,
115 .ppu.reg_base = (uintptr_t)vppu_regsys1,
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/SCP-firmware-master/product/sgm776/scp_romfw/
A Dconfig_ppu_v1.c28 .ppu.reg_base = PPU_SYS0_BASE,
29 .ppu.irq = PPU_SYS0_IRQ,
38 .ppu.reg_base = PPU_SYS1_BASE,
39 .ppu.irq = PPU_SYS1_IRQ,
48 .ppu.reg_base = PPU_CLUS0_BASE,
49 .ppu.irq = PPU_CLUS0_IRQ,
57 .ppu.reg_base = PPU_CLUS0CORE0_BASE,
58 .ppu.irq = PPU_CLUS0CORE0_IRQ,
/SCP-firmware-master/product/sgm775/scp_romfw/
A Dconfig_ppu_v0.c26 .ppu.reg_base = PPU_SYS0_BASE,
27 .ppu.irq = PPU_SYS0_IRQ,
35 .ppu.reg_base = PPU_SYS1_BASE,
36 .ppu.irq = PPU_SYS1_IRQ,
A Dconfig_ppu_v1.c25 .ppu.reg_base = PPU_CLUS0_BASE,
26 .ppu.irq = FWK_INTERRUPT_NONE,
34 .ppu.reg_base = PPU_CLUS0CORE0_BASE,
35 .ppu.irq = FWK_INTERRUPT_NONE,
/SCP-firmware-master/product/synquacer/scp_ramfw/
A Dconfig_ppu_v0_synquacer.c33 .ppu.reg_base = (uintptr_t)PPU_SYS3,
41 .ppu.reg_base = (uintptr_t)PPU_SYS1,
49 .ppu.reg_base = (uintptr_t)PPU_SYS2,
57 .ppu.reg_base = (uintptr_t)PPU_DEBUG,
65 .ppu.reg_base = (uintptr_t)PPU_SYS0,
119 ppu_v0_config->ppu.reg_base = in ppu_v0_get_element_table()
121 ppu_v0_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v0_get_element_table()
139 ppu_v0_config->ppu.reg_base = (uintptr_t)PPU_CLUSTER(cluster_idx); in ppu_v0_get_element_table()
140 ppu_v0_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v0_get_element_table()
/SCP-firmware-master/product/tc0/scp_romfw/
A Dconfig_ppu_v1.c42 .ppu.reg_base = SCP_PPU_SYS0_BASE,
51 .ppu.reg_base = SCP_PPU_SYS1_BASE,
95 pd_config->ppu.reg_base = SCP_PPU_CORE_BASE(0); in tc0_ppu_v1_get_element_table()
96 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in tc0_ppu_v1_get_element_table()
113 pd_config->ppu.reg_base = SCP_PPU_CLUSTER_BASE; in tc0_ppu_v1_get_element_table()
114 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in tc0_ppu_v1_get_element_table()
/SCP-firmware-master/product/tc0/scp_ramfw/
A Dconfig_ppu_v1.c48 .ppu.reg_base = SCP_PPU_SYS0_BASE,
57 .ppu.reg_base = SCP_PPU_SYS1_BASE,
112 pd_config->ppu.reg_base = SCP_PPU_CORE_BASE(core_idx); in ppu_v1_get_element_table()
113 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
131 pd_config->ppu.reg_base = SCP_PPU_CLUSTER_BASE; in ppu_v1_get_element_table()
132 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
/SCP-firmware-master/product/morello/scp_ramfw_soc/
A Dconfig_ppu_v1.c63 .ppu.reg_base = SCP_PPU_SYS0_BASE,
72 .ppu.reg_base = SCP_PPU_SYS1_BASE,
81 .ppu.reg_base = SCP_PPU_GPU_BASE,
90 .ppu.reg_base = SCP_PPU_DPU_BASE,
155 pd_config->ppu.reg_base = SCP_PPU_CORE_BASE(cluster_idx, core_idx); in ppu_v1_get_element_table()
156 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
180 pd_config->ppu.reg_base = SCP_PPU_CLUSTER_BASE(cluster_idx); in ppu_v1_get_element_table()
181 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
/SCP-firmware-master/product/rdv1/scp_ramfw/
A Dconfig_ppu_v1.c44 .ppu.reg_base = SCP_PPU_SYS0_BASE,
52 .ppu.reg_base = SCP_PPU_SYS1_BASE,
105 pd_config->ppu.reg_base = SCP_PPU_BASE(cluster_idx); in ppu_v1_get_element_table()
106 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
124 pd_config->ppu.reg_base = SCP_PPU_BASE(cluster_idx); in ppu_v1_get_element_table()
125 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
/SCP-firmware-master/product/sgi575/scp_ramfw/
A Dconfig_ppu_v1.c49 .ppu.reg_base = SCP_PPU_SYS0_BASE,
57 .ppu.reg_base = SCP_PPU_SYS1_BASE,
107 pd_config->ppu.reg_base = SCP_PPU_CORE_BASE(cluster_idx, core_idx); in ppu_v1_get_element_table()
108 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
127 pd_config->ppu.reg_base = SCP_PPU_CLUSTER_BASE(cluster_idx); in ppu_v1_get_element_table()
128 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
/SCP-firmware-master/product/rdn1e1/scp_ramfw/
A Dconfig_ppu_v1.c49 .ppu.reg_base = SCP_PPU_SYS0_BASE,
57 .ppu.reg_base = SCP_PPU_SYS1_BASE,
107 pd_config->ppu.reg_base = SCP_PPU_CORE_BASE(cluster_idx, core_idx); in ppu_v1_get_element_table()
108 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
127 pd_config->ppu.reg_base = SCP_PPU_CLUSTER_BASE(cluster_idx); in ppu_v1_get_element_table()
128 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
/SCP-firmware-master/product/tc1/scp_romfw/
A Dconfig_ppu_v1.c42 .ppu.reg_base = SCP_PPU_SYS0_BASE,
88 pd_config->ppu.reg_base = SCP_PPU_CORE_BASE(0); in tc1_ppu_v1_get_element_table()
89 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in tc1_ppu_v1_get_element_table()
107 pd_config->ppu.reg_base = SCP_PPU_CLUSTER_BASE; in tc1_ppu_v1_get_element_table()
108 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in tc1_ppu_v1_get_element_table()
/SCP-firmware-master/product/tc2/scp_romfw/
A Dconfig_ppu_v1.c43 .ppu.reg_base = SCP_PPU_SYS0_BASE,
89 pd_config->ppu.reg_base = SCP_PPU_CORE_BASE(0); in tc2_ppu_v1_get_element_table()
90 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in tc2_ppu_v1_get_element_table()
107 pd_config->ppu.reg_base = SCP_PPU_CLUSTER_BASE; in tc2_ppu_v1_get_element_table()
108 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in tc2_ppu_v1_get_element_table()
/SCP-firmware-master/module/mock_ppu/src/
A Dmod_mock_ppu.c25 uint32_t *ppu; member
60 *pd_ctx->ppu = MOD_PD_STATE_ON; in pd_set_state()
67 *pd_ctx->ppu = MOD_PD_STATE_OFF; in pd_set_state()
90 *state = *pd_ctx->ppu; in pd_get_state()
101 *pd_ctx->ppu = MOD_PD_STATE_ON; in pd_reset()
143 pd_ctx->ppu = (uint32_t *)(config->ppu.reg_base); in mock_ppu_pd_init()
151 *pd_ctx->ppu = MOD_PD_STATE_ON; in mock_ppu_pd_init()
/SCP-firmware-master/product/morello/scp_ramfw_fvp/
A Dconfig_ppu_v1.c52 .ppu.reg_base = SCP_PPU_SYS0_BASE,
62 .ppu.reg_base = SCP_PPU_SYS1_BASE,
124 pd_config->ppu.reg_base = SCP_PPU_CORE_BASE(cluster_idx, core_idx); in ppu_v1_get_element_table()
125 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
148 pd_config->ppu.reg_base = SCP_PPU_CLUSTER_BASE(cluster_idx); in ppu_v1_get_element_table()
149 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
/SCP-firmware-master/product/rdv1mc/scp_ramfw/
A Dconfig_ppu_v1.c44 .ppu.reg_base = SCP_PPU_SYS0_BASE,
52 .ppu.reg_base = SCP_PPU_SYS1_BASE,
111 pd_config->ppu.reg_base = SCP_PPU_BASE(cluster_idx); in ppu_v1_get_element_table()
112 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()
132 pd_config->ppu.reg_base = SCP_PPU_BASE(cluster_idx); in ppu_v1_get_element_table()
133 pd_config->ppu.irq = FWK_INTERRUPT_NONE; in ppu_v1_get_element_table()

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