/SCP-firmware-master/module/optee/clock/src/ |
A D | mod_optee_clock.c | 185 range->min = 0; in get_range() 186 range->max = 0; in get_range() 187 range->rate_count = 1; in get_range() 195 range->max = range->min; in get_range() 196 range->rate_count = 1; in get_range() 202 range->rate_count = rate_count; in get_range() 203 range->min = UINT64_MAX; in get_range() 204 range->max = 0; in get_range() 212 if (rate > range->max) { in get_range() 213 range->max = rate; in get_range() [all …]
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/SCP-firmware-master/module/system_pll/src/ |
A D | mod_system_pll.c | 197 static int system_pll_get_range(fwk_id_t dev_id, struct mod_clock_range *range) in system_pll_get_range() argument 203 if (range == NULL) in system_pll_get_range() 208 range->rate_type = MOD_CLOCK_RATE_TYPE_CONTINUOUS; in system_pll_get_range() 209 range->min = ctx->config->min_rate; in system_pll_get_range() 210 range->max = ctx->config->max_rate; in system_pll_get_range() 211 range->step = ctx->config->min_step; in system_pll_get_range()
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/SCP-firmware-master/product/rcar/module/rcar_sd_clock/src/ |
A D | mod_rcar_sd_clock.c | 189 static int sd_clock_get_range(fwk_id_t dev_id, struct mod_clock_range *range) in sd_clock_get_range() argument 193 if (range == NULL) in sd_clock_get_range() 198 range->rate_type = ctx->config->rate_type; in sd_clock_get_range() 200 if (MOD_CLOCK_RATE_TYPE_CONTINUOUS == range->rate_type) { in sd_clock_get_range() 202 range->min = ctx->rate_table[0]; in sd_clock_get_range() 203 range->max = ctx->rate_table[1]; in sd_clock_get_range() 204 range->step = ctx->rate_table[2]; in sd_clock_get_range() 207 range->min = ctx->rate_table[0]; in sd_clock_get_range() 208 range->max = ctx->rate_table[ctx->config->rate_count - 1]; in sd_clock_get_range() 211 range->rate_count = ctx->config->rate_count; in sd_clock_get_range()
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/SCP-firmware-master/product/morello/module/morello_pll/src/ |
A D | mod_morello_pll.c | 247 static int morello_pll_get_range(fwk_id_t dev_id, struct mod_clock_range *range) in morello_pll_get_range() argument 249 if ((!fwk_module_is_valid_element_id(dev_id)) || (range == NULL)) { in morello_pll_get_range() 253 range->rate_type = MOD_CLOCK_RATE_TYPE_CONTINUOUS; in morello_pll_get_range() 254 range->min = MOD_MORELLO_PLL_RATE_MIN; in morello_pll_get_range() 255 range->max = MOD_MORELLO_PLL_RATE_MAX; in morello_pll_get_range() 256 range->step = MOD_MORELLO_PLL_STEP_SIZE; in morello_pll_get_range()
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/SCP-firmware-master/product/n1sdp/module/n1sdp_pll/src/ |
A D | mod_n1sdp_pll.c | 227 static int n1sdp_pll_get_range(fwk_id_t dev_id, struct mod_clock_range *range) in n1sdp_pll_get_range() argument 229 if ((!fwk_module_is_valid_element_id(dev_id)) || (range == NULL)) { in n1sdp_pll_get_range() 233 range->rate_type = MOD_CLOCK_RATE_TYPE_CONTINUOUS; in n1sdp_pll_get_range() 234 range->min = MOD_N1SDP_PLL_RATE_MIN; in n1sdp_pll_get_range() 235 range->max = MOD_N1SDP_PLL_RATE_MAX; in n1sdp_pll_get_range() 236 range->step = MOD_N1SDP_PLL_STEP_SIZE; in n1sdp_pll_get_range()
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/SCP-firmware-master/module/mock_clock/src/ |
A D | mod_mock_clock.c | 161 struct mod_clock_range *range) in mod_mock_clock_get_range() argument 167 range->rate_type = MOD_CLOCK_RATE_TYPE_DISCRETE; in mod_mock_clock_get_range() 168 range->min = ctx->config->rate_table[0].rate; in mod_mock_clock_get_range() 169 range->max = ctx->config->rate_table[ctx->config->rate_count - 1].rate; in mod_mock_clock_get_range() 170 range->rate_count = ctx->config->rate_count; in mod_mock_clock_get_range()
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/SCP-firmware-master/module/css_clock/src/ |
A D | mod_css_clock.c | 228 static int css_clock_get_range(fwk_id_t dev_id, struct mod_clock_range *range) in css_clock_get_range() argument 232 if (range == NULL) in css_clock_get_range() 238 range->rate_type = MOD_CLOCK_RATE_TYPE_DISCRETE; in css_clock_get_range() 239 range->min = ctx->config->rate_table[0].rate; in css_clock_get_range() 240 range->max = ctx->config->rate_table[ctx->config->rate_count - 1].rate; in css_clock_get_range() 241 range->rate_count = ctx->config->rate_count; in css_clock_get_range() 244 return ctx->pll_api->get_range(ctx->config->pll_id, range); in css_clock_get_range()
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/SCP-firmware-master/product/juno/module/juno_hdlcd/src/ |
A D | mod_juno_hdlcd.c | 316 struct mod_clock_range *range) in juno_hdlcd_get_range() argument 322 range->min = ctx->config->min_rate; in juno_hdlcd_get_range() 323 range->max = ctx->config->max_rate; in juno_hdlcd_get_range() 324 range->step = ctx->config->min_step; in juno_hdlcd_get_range() 325 range->rate_type = ctx->config->rate_type; in juno_hdlcd_get_range()
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/SCP-firmware-master/module/clock/include/ |
A D | mod_clock.h | 245 struct mod_clock_range range; member 343 int (*get_range)(fwk_id_t clock_id, struct mod_clock_range *range);
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/SCP-firmware-master/product/synquacer/module/synquacer_pik_clock/src/ |
A D | mod_synquacer_pik_clock.c | 478 static int pik_clock_get_range(fwk_id_t dev_id, struct mod_clock_range *range) in pik_clock_get_range() argument 482 if (range == NULL) in pik_clock_get_range() 487 range->rate_type = MOD_CLOCK_RATE_TYPE_DISCRETE; in pik_clock_get_range() 488 range->min = ctx->config->rate_table[0].rate; in pik_clock_get_range() 489 range->max = ctx->config->rate_table[ctx->config->rate_count - 1].rate; in pik_clock_get_range() 490 range->rate_count = ctx->config->rate_count; in pik_clock_get_range()
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/SCP-firmware-master/module/pik_clock/src/ |
A D | mod_pik_clock.c | 466 static int pik_clock_get_range(fwk_id_t dev_id, struct mod_clock_range *range) in pik_clock_get_range() argument 470 if (range == NULL) in pik_clock_get_range() 475 range->rate_type = MOD_CLOCK_RATE_TYPE_DISCRETE; in pik_clock_get_range() 476 range->min = ctx->config->rate_table[0].rate; in pik_clock_get_range() 477 range->max = ctx->config->rate_table[ctx->config->rate_count - 1].rate; in pik_clock_get_range() 478 range->rate_count = ctx->config->rate_count; in pik_clock_get_range()
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/SCP-firmware-master/module/apremap/doc/ |
A D | module_apremap_design.md | 34 … | Address in range | No | 105 1. For an address that falls within the first 2GB range of application processor 109 2. For an address that falls above the 2GB range of application processor memory 111 space and uses the System Access Port 1's 1MB windowing range to access the
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/SCP-firmware-master/product/juno/module/juno_soc_clock_ram/src/ |
A D | mod_juno_soc_clock_ram.c | 471 struct mod_clock_range *range) in juno_soc_clock_get_range() argument 477 range->rate_type = MOD_CLOCK_RATE_TYPE_DISCRETE; in juno_soc_clock_get_range() 478 range->min = ctx->config->rate_table[0].rate; in juno_soc_clock_get_range() 479 range->max = ctx->config->rate_table[ctx->config->rate_count - 1].rate; in juno_soc_clock_get_range() 480 range->rate_count = ctx->config->rate_count; in juno_soc_clock_get_range()
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/SCP-firmware-master/product/juno/module/juno_cdcel937/src/ |
A D | mod_juno_cdcel937.c | 809 struct mod_clock_range *range) in juno_cdcel937_get_range() argument 818 range->min = ctx->config->lookup_table[0].rate_hz; in juno_cdcel937_get_range() 819 range->max = ctx->config->lookup_table[last_idx].rate_hz; in juno_cdcel937_get_range() 820 range->rate_count = ctx->config->lookup_table_count; in juno_cdcel937_get_range() 822 range->min = ctx->config->min_rate; in juno_cdcel937_get_range() 823 range->max = ctx->config->max_rate; in juno_cdcel937_get_range() 824 range->step = ctx->config->min_step; in juno_cdcel937_get_range() 827 range->rate_type = ctx->config->rate_type; in juno_cdcel937_get_range()
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/SCP-firmware-master/product/rcar/module/rcar_ext_clock/src/ |
A D | mod_rcar_ext_clock.c | 62 static int ext_clock_get_range(fwk_id_t dev_id, struct mod_clock_range *range) in ext_clock_get_range() argument
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/SCP-firmware-master/module/scmi_clock/src/ |
A D | mod_scmi_clock.c | 1278 if (info.range.rate_type == MOD_CLOCK_RATE_TYPE_DISCRETE) { in scmi_clock_describe_rates_handler() 1281 if (index >= info.range.rate_count) { in scmi_clock_describe_rates_handler() 1300 info.range.rate_count - index); in scmi_clock_describe_rates_handler() 1309 (unsigned int)(info.range.rate_count - index) - rate_count; in scmi_clock_describe_rates_handler() 1356 clock_range[0].low = (uint32_t)info.range.min; in scmi_clock_describe_rates_handler() 1357 clock_range[0].high = (uint32_t)(info.range.min >> 32); in scmi_clock_describe_rates_handler() 1358 clock_range[1].low = (uint32_t)info.range.max; in scmi_clock_describe_rates_handler() 1359 clock_range[1].high = (uint32_t)(info.range.max >> 32); in scmi_clock_describe_rates_handler() 1360 clock_range[2].low = (uint32_t)info.range.step; in scmi_clock_describe_rates_handler() 1361 clock_range[2].high = (uint32_t)(info.range.step >> 32); in scmi_clock_describe_rates_handler()
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/SCP-firmware-master/product/rcar/module/rcar_clock/include/ |
A D | mod_rcar_clock.h | 121 int (*get_range)(fwk_id_t clock_id, struct mod_clock_range *range);
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/SCP-firmware-master/product/rcar/module/rcar_mstp_clock/src/ |
A D | mod_rcar_mstp_clock.c | 139 static int mstp_clock_get_range(fwk_id_t dev_id, struct mod_clock_range *range) in mstp_clock_get_range() argument
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/SCP-firmware-master/product/morello/module/dmc_bing/src/ |
A D | morello_ddr_phy.c | 309 uint32_t range; in write_eye_detect_single_rank() local 372 range = 1; in write_eye_detect_single_rank() 374 direct_addr = (tccd_l << 10) | (1 << 7) | (range - 1) << 6; in write_eye_detect_single_rank()
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/SCP-firmware-master/product/n1sdp/module/n1sdp_ddr_phy/src/ |
A D | mod_n1sdp_ddr_phy.c | 381 uint32_t range; in write_eye_detect_single_rank() local 444 range = 1; in write_eye_detect_single_rank() 447 direct_addr = (tccd_l << 10) | (1 << 7) | (range - 1) << 6; in write_eye_detect_single_rank()
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/SCP-firmware-master/module/scmi_apcore/doc/ |
A D | scmi_apcore.md | 20 The protocol identifier used for this protocol (0x90) is within the range that
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/SCP-firmware-master/module/clock/src/ |
A D | mod_clock.c | 338 status = ctx->api->get_range(ctx->config->driver_id, &info->range); in clock_get_info()
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/SCP-firmware-master/doc/ |
A D | Doxyfile | 418 # cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range
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