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Searched refs:rate (Results 1 – 25 of 79) sorted by relevance

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/SCP-firmware-master/product/rcar/module/rcar_clock/src/
A Dmod_rcar_clock.c521 rate = DIV_ROUND(rate, 2); in pll_clk_parent_rate()
523 return rate; in pll_clk_parent_rate()
540 rate = 100000000 * DIV_ROUND(rate, 100000000); in pll0_clk_round_rate()
542 return rate; in pll0_clk_round_rate()
556 rate = 100000000 * DIV_ROUND(rate, 100000000); in pll0_clk_recalc_rate()
558 return rate; in pll0_clk_recalc_rate()
597 rate = 100000000 * DIV_ROUND(rate, 100000000); in pll2_clk_round_rate()
599 return rate; in pll2_clk_round_rate()
613 rate = 100000000 * DIV_ROUND(rate, 100000000); in pll2_clk_recalc_rate()
681 rate = 100000000 * DIV_ROUND(rate, 100000000); in z_clk_recalc_rate()
[all …]
/SCP-firmware-master/product/optee-fvp/fw/
A Dconfig_mock_clock.c14 { .rate = 1536000 }, { .rate = 2116800 }, { .rate = 2304000 },
15 { .rate = 4233600 }, { .rate = 4608000 }, { .rate = 8467200 },
16 { .rate = 9216000 },
20 { .rate = 2116800 },
24 { .rate = 2304000 },
28 { .rate = 4233600 },
/SCP-firmware-master/product/juno/scp_ramfw/
A Dconfig_mock_clock.c16 { .rate = 1536000 }, { .rate = 2116800 }, { .rate = 2304000 },
17 { .rate = 4233600 }, { .rate = 4608000 }, { .rate = 8467200 },
18 { .rate = 9216000 },
A Dconfig_juno_soc_clock_ram.c31 .rate = 450 * FWK_MHZ,
41 .rate = 625 * FWK_MHZ,
51 .rate = 800 * FWK_MHZ,
57 .rate = 950 * FWK_MHZ,
67 .rate = 1100 * FWK_MHZ,
80 .rate = 600 * FWK_MHZ,
90 .rate = 900 * FWK_MHZ,
100 .rate = 1150 * FWK_MHZ,
113 .rate = 600 * FWK_MHZ,
151 .rate = 450 * FWK_MHZ,
[all …]
/SCP-firmware-master/product/rcar/scp_ramfw/
A Dconfig_rcar_clock.c24 .rate = 800 * FWK_MHZ,
30 .rate = 1000 * FWK_MHZ,
36 .rate = 1200 * FWK_MHZ,
45 .rate = 500 * FWK_MHZ,
51 .rate = 1000 * FWK_MHZ,
57 .rate = 1500 * FWK_MHZ,
63 .rate = 1600 * FWK_MHZ,
69 .rate = 1700 * FWK_MHZ,
/SCP-firmware-master/module/mock_clock/src/
A Dmod_mock_clock.c69 uint64_t rate, in mod_mock_clock_set_rate() argument
87 status = get_rate_entry(ctx, rate, &rate_entry); in mod_mock_clock_set_rate()
110 *rate = ctx->config->rate_table[ctx->current_rate_index].rate; in mod_mock_clock_get_rate()
118 uint64_t *rate) in mod_mock_clock_get_rate_from_index() argument
128 *rate = ctx->config->rate_table[rate_index].rate; in mod_mock_clock_get_rate_from_index()
168 range->min = ctx->config->rate_table[0].rate; in mod_mock_clock_get_range()
247 uint64_t rate; in mod_mock_clock_element_init() local
258 rate = cfg->rate_table[rate_index].rate; in mod_mock_clock_element_init()
261 if (rate < last_rate) { in mod_mock_clock_element_init()
265 last_rate = rate; in mod_mock_clock_element_init()
[all …]
/SCP-firmware-master/module/system_pll/src/
A Dmod_system_pll.c86 static int system_pll_set_rate(fwk_id_t dev_id, uint64_t rate, in system_pll_set_rate() argument
103 if ((rate % ctx->config->min_step) > 0) { in system_pll_set_rate()
112 if ((rate - rounded_rate) > (rounded_rate_alt - rate)) in system_pll_set_rate()
125 rounded_rate = rate; in system_pll_set_rate()
150 static int system_pll_get_rate(fwk_id_t dev_id, uint64_t *rate) in system_pll_get_rate() argument
156 if (rate == NULL) in system_pll_get_rate()
160 *rate = ctx->current_rate; in system_pll_get_rate()
167 uint64_t *rate) in system_pll_get_rate_from_index() argument
220 uint64_t rate; in system_pll_power_state_change() local
232 rate = ctx->current_rate; in system_pll_power_state_change()
[all …]
/SCP-firmware-master/product/morello/module/morello_pll/src/
A Dmod_morello_pll.c61 uint64_t rate, in pll_set_rate() argument
80 if ((rate < MOD_MORELLO_PLL_RATE_MIN) || in pll_set_rate()
81 (rate > MOD_MORELLO_PLL_RATE_MAX)) { in pll_set_rate()
90 if ((rate % config->ref_rate) == 0) { in pll_set_rate()
91 fbdiv_d = rate / config->ref_rate; in pll_set_rate()
175 ctx->current_rate = rate; in pll_set_rate()
186 uint64_t rate, in morello_pll_set_rate() argument
209 *rate = ctx->current_rate; in morello_pll_get_rate()
217 uint64_t *rate) in morello_pll_get_rate_from_index() argument
263 uint64_t rate; in morello_pll_power_state_change() local
[all …]
/SCP-firmware-master/product/morello/scp_ramfw_soc/
A Dconfig_css_clock.c24 .rate = CSS_CLK_RATE_CPU_GRP0_SUPER_UNDERDRIVE,
34 .rate = CSS_CLK_RATE_CPU_GRP0_UNDERDRIVE,
44 .rate = CSS_CLK_RATE_CPU_GRP0_NOMINAL,
54 .rate = CSS_CLK_RATE_CPU_GRP0_OVERDRIVE,
87 .rate = CSS_CLK_RATE_CPU_GRP1_UNDERDRIVE,
97 .rate = CSS_CLK_RATE_CPU_GRP1_NOMINAL,
107 .rate = CSS_CLK_RATE_CPU_GRP1_OVERDRIVE,
136 .rate = CSS_CLK_RATE_GPU_UNDERDRIVE,
143 .rate = CSS_CLK_RATE_GPU_NOMINAL,
150 .rate = CSS_CLK_RATE_GPU_OVERDRIVE,
[all …]
A Dconfig_pik_clock.c44 .rate = SCC_CLK_RATE_SYSAPBCLK,
170 .rate = PIK_CLK_RATE_CLUS0,
179 .rate = PIK_CLK_RATE_CLUS1,
278 .rate = PIK_CLK_RATE_GPU,
287 .rate = PIK_CLK_RATE_DPU,
377 .rate = PIK_CLK_RATE_UART,
386 .rate = PIK_CLK_RATE_TCU0,
395 .rate = PIK_CLK_RATE_TCU1,
404 .rate = PIK_CLK_RATE_TCU2,
413 .rate = PIK_CLK_RATE_TCU3,
[all …]
/SCP-firmware-master/product/sgm775/scp_ramfw/
A Dconfig_css_clock.c24 .rate = 1313 * FWK_MHZ,
34 .rate = 1531 * FWK_MHZ,
44 .rate = 1750 * FWK_MHZ,
54 .rate = 2100 * FWK_MHZ,
64 .rate = 2450 * FWK_MHZ,
77 .rate = 665 * FWK_MHZ,
87 .rate = 998 * FWK_MHZ,
97 .rate = 1330 * FWK_MHZ,
129 .rate = 450 * FWK_MHZ,
143 .rate = 525 * FWK_MHZ,
[all …]
/SCP-firmware-master/product/n1sdp/module/n1sdp_pll/src/
A Dmod_n1sdp_pll.c72 fwk_assert(rate <= ((uint64_t)UINT16_MAX * FWK_MHZ)); in pll_set_rate()
80 if ((rate < MOD_N1SDP_PLL_RATE_MIN) || (rate > MOD_N1SDP_PLL_RATE_MAX)) { in pll_set_rate()
87 fbdiv = rate / config->ref_rate; in pll_set_rate()
158 ctx->current_rate = rate; in pll_set_rate()
167 static int n1sdp_pll_set_rate(fwk_id_t dev_id, uint64_t rate, in n1sdp_pll_set_rate() argument
178 return pll_set_rate(ctx, rate, unused); in n1sdp_pll_set_rate()
190 *rate = ctx->current_rate; in n1sdp_pll_get_rate()
197 uint64_t *rate) in n1sdp_pll_get_rate_from_index() argument
243 uint64_t rate; in n1sdp_pll_power_state_change() local
260 rate = ctx->current_rate; in n1sdp_pll_power_state_change()
[all …]
/SCP-firmware-master/product/morello/scp_ramfw_fvp/
A Dconfig_css_clock.c25 .rate = CSS_CLK_RATE_CPU_GRP0_SUPER_UNDERDRIVE,
35 .rate = CSS_CLK_RATE_CPU_GRP0_UNDERDRIVE,
45 .rate = CSS_CLK_RATE_CPU_GRP0_NOMINAL,
55 .rate = CSS_CLK_RATE_CPU_GRP0_OVERDRIVE,
65 .rate = CSS_CLK_RATE_CPU_GRP0_SUPER_OVERDRIVE,
78 .rate = CSS_CLK_RATE_CPU_GRP1_SUPER_UNDERDRIVE,
88 .rate = CSS_CLK_RATE_CPU_GRP1_UNDERDRIVE,
98 .rate = CSS_CLK_RATE_CPU_GRP1_NOMINAL,
108 .rate = CSS_CLK_RATE_CPU_GRP1_OVERDRIVE,
118 .rate = CSS_CLK_RATE_CPU_GRP1_SUPER_OVERDRIVE,
A Dconfig_pik_clock.c49 .rate = SCC_CLK_RATE_SYSAPBCLK,
58 .rate = SCC_CLK_RATE_SCPNICCLK,
67 .rate = SCC_CLK_RATE_SCPI2CCLK,
175 .rate = PIK_CLK_RATE_CLUS0,
184 .rate = PIK_CLK_RATE_CLUS1,
364 .rate = PIK_CLK_RATE_UART,
373 .rate = PIK_CLK_RATE_TCU0,
382 .rate = PIK_CLK_RATE_TCU1,
391 .rate = PIK_CLK_RATE_TCU2,
400 .rate = PIK_CLK_RATE_TCU3,
[all …]
/SCP-firmware-master/product/n1sdp/scp_ramfw/
A Dconfig_css_clock.c25 .rate = CSS_CLK_RATE_CPU_GRP0_SUPER_UNDERDRIVE,
35 .rate = CSS_CLK_RATE_CPU_GRP0_UNDERDRIVE,
45 .rate = CSS_CLK_RATE_CPU_GRP0_NOMINAL,
55 .rate = CSS_CLK_RATE_CPU_GRP0_OVERDRIVE,
65 .rate = CSS_CLK_RATE_CPU_GRP0_SUPER_OVERDRIVE,
78 .rate = CSS_CLK_RATE_CPU_GRP1_SUPER_UNDERDRIVE,
88 .rate = CSS_CLK_RATE_CPU_GRP1_UNDERDRIVE,
98 .rate = CSS_CLK_RATE_CPU_GRP1_NOMINAL,
108 .rate = CSS_CLK_RATE_CPU_GRP1_OVERDRIVE,
118 .rate = CSS_CLK_RATE_CPU_GRP1_SUPER_OVERDRIVE,
A Dconfig_pik_clock.c50 .rate = SCC_CLK_RATE_SYSAPBCLK,
59 .rate = SCC_CLK_RATE_SCPNICCLK,
68 .rate = SCC_CLK_RATE_SCPI2CCLK,
176 .rate = PIK_CLK_RATE_CLUS0,
185 .rate = PIK_CLK_RATE_CLUS1,
365 .rate = PIK_CLK_RATE_UART,
374 .rate = PIK_CLK_RATE_TCU0,
383 .rate = PIK_CLK_RATE_TCU1,
392 .rate = PIK_CLK_RATE_TCU2,
401 .rate = PIK_CLK_RATE_TCU3,
[all …]
/SCP-firmware-master/module/optee/clock/src/
A Dmod_optee_clock.c63 if ((ctx == NULL) || (rate == NULL)) { in get_rate()
68 *rate = 0; in get_rate()
72 *rate = clk_get_rate(ctx->clk); in get_rate()
78 *rate); in get_rate()
173 unsigned long rate; in get_range() local
212 if (rate > range->max) { in get_range()
213 range->max = rate; in get_range()
215 range->min = rate; in get_range()
245 rate); in set_rate()
263 *rate = 0; in get_rate_from_index()
[all …]
/SCP-firmware-master/product/tc0/scp_ramfw/
A Dconfig_css_clock.c23 .rate = 768 * FWK_MHZ,
33 .rate = 1153 * FWK_MHZ,
43 .rate = 1537 * FWK_MHZ,
53 .rate = 1844 * FWK_MHZ,
63 .rate = 2152 * FWK_MHZ,
76 .rate = 946 * FWK_MHZ,
86 .rate = 1419 * FWK_MHZ,
96 .rate = 1893 * FWK_MHZ,
106 .rate = 2271 * FWK_MHZ,
116 .rate = 2650 * FWK_MHZ,
[all …]
/SCP-firmware-master/product/tc1/scp_ramfw/
A Dconfig_css_clock.c23 .rate = 768 * FWK_MHZ,
33 .rate = 1153 * FWK_MHZ,
43 .rate = 1537 * FWK_MHZ,
53 .rate = 1844 * FWK_MHZ,
63 .rate = 2152 * FWK_MHZ,
76 .rate = 946 * FWK_MHZ,
86 .rate = 1419 * FWK_MHZ,
96 .rate = 1893 * FWK_MHZ,
106 .rate = 2271 * FWK_MHZ,
116 .rate = 2650 * FWK_MHZ,
[all …]
/SCP-firmware-master/product/tc2/scp_ramfw/
A Dconfig_css_clock.c23 .rate = 768 * FWK_MHZ,
33 .rate = 1153 * FWK_MHZ,
43 .rate = 1537 * FWK_MHZ,
53 .rate = 1844 * FWK_MHZ,
63 .rate = 2152 * FWK_MHZ,
76 .rate = 946 * FWK_MHZ,
86 .rate = 1419 * FWK_MHZ,
96 .rate = 1893 * FWK_MHZ,
106 .rate = 2271 * FWK_MHZ,
116 .rate = 2650 * FWK_MHZ,
[all …]
/SCP-firmware-master/product/sgi575/scp_ramfw/
A Dconfig_css_clock.c25 .rate = 1313 * FWK_MHZ,
35 .rate = 1531 * FWK_MHZ,
45 .rate = 1750 * FWK_MHZ,
55 .rate = 2100 * FWK_MHZ,
65 .rate = 2600 * FWK_MHZ,
78 .rate = 1313 * FWK_MHZ,
88 .rate = 1531 * FWK_MHZ,
98 .rate = 1750 * FWK_MHZ,
108 .rate = 2100 * FWK_MHZ,
118 .rate = 2600 * FWK_MHZ,
/SCP-firmware-master/product/rdn1e1/scp_ramfw/
A Dconfig_css_clock.c25 .rate = 1313 * FWK_MHZ,
35 .rate = 1531 * FWK_MHZ,
45 .rate = 1750 * FWK_MHZ,
55 .rate = 2100 * FWK_MHZ,
65 .rate = 2600 * FWK_MHZ,
78 .rate = 1313 * FWK_MHZ,
88 .rate = 1531 * FWK_MHZ,
98 .rate = 1750 * FWK_MHZ,
108 .rate = 2100 * FWK_MHZ,
118 .rate = 2600 * FWK_MHZ,
/SCP-firmware-master/product/sgm776/scp_ramfw/
A Dconfig_css_clock.c27 .rate = 1313 * FWK_MHZ,
37 .rate = 1531 * FWK_MHZ,
47 .rate = 1750 * FWK_MHZ,
57 .rate = 2100 * FWK_MHZ,
67 .rate = 2700 * FWK_MHZ,
80 .rate = 665 * FWK_MHZ,
90 .rate = 998 * FWK_MHZ,
100 .rate = 1330 * FWK_MHZ,
132 .rate = 450 * FWK_MHZ,
146 .rate = 525 * FWK_MHZ,
[all …]
/SCP-firmware-master/module/css_clock/src/
A Dmod_css_clock.c46 return (key->rate - element->rate); in compare_rate_entry()
82 status = get_rate_entry(ctx, rate, &rate_entry); in set_rate_indexed()
124 ctx->current_rate = rate; in set_rate_indexed()
160 ctx->current_rate = rate; in set_rate_non_indexed()
176 return set_rate_indexed(ctx, rate, round_mode); in css_clock_set_rate()
178 return set_rate_non_indexed(ctx, rate, round_mode); in css_clock_set_rate()
186 *rate = ctx->current_rate; in css_clock_get_rate()
193 uint64_t *rate) in css_clock_get_rate_from_index() argument
197 if (rate == NULL) in css_clock_get_rate_from_index()
206 *rate = ctx->config->rate_table[rate_index].rate; in css_clock_get_rate_from_index()
[all …]
/SCP-firmware-master/product/tc0/scp_romfw/
A Dconfig_css_clock.c23 .rate = 768 * FWK_MHZ,
33 .rate = 1153 * FWK_MHZ,
43 .rate = 1537 * FWK_MHZ,
53 .rate = 1844 * FWK_MHZ,
63 .rate = 2152 * FWK_MHZ,

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