1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef SGI575_SDS_H
9 #define SGI575_SDS_H
10 
11 #include <mod_sds.h>
12 
13 #include <stdint.h>
14 
15 /*
16  * Structure identifiers.
17  */
18 enum sgi575_sds_struct_id {
19     SGI575_SDS_CPU_INFO = 1 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
20     SGI575_SDS_FIRMWARE_VERSION = 2 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
21     SGI575_SDS_PLATFORM_ID = 3 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
22     SGI575_SDS_RESET_SYNDROME = 4 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
23     SGI575_SDS_FEATURE_AVAILABILITY =
24         5 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
25     SGI575_SDS_CPU_BOOTCTR = 6 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
26     SGI575_SDS_CPU_FLAGS = 7 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
27 };
28 
29 enum sgi575_sds_region_idx {
30     SGI575_SDS_REGION_SECURE,
31 #ifdef BUILD_MODE_DEBUG
32     SGI575_SDS_REGION_NONSECURE,
33 #endif
34     SGI575_SDS_REGION_COUNT,
35 };
36 
37 /*
38  * Structure sizes.
39  */
40 #define SGI575_SDS_CPU_INFO_SIZE 4
41 #define SGI575_SDS_FIRMWARE_VERSION_SIZE 4
42 #define SGI575_SDS_PLATFORM_ID_SIZE 8
43 #define SGI575_SDS_RESET_SYNDROME_SIZE 4
44 #define SGI575_SDS_FEATURE_AVAILABILITY_SIZE 4
45 #define SGI575_SDS_CPU_BOOTCTR_SIZE 256
46 #define SGI575_SDS_CPU_FLAGS_SIZE 256
47 
48 /*
49  * Field masks and offsets for the SGI575_SDS_AP_CPU_INFO structure.
50  */
51 #define SGI575_SDS_CPU_INFO_PRIMARY_MASK 0xFFFFFFFF
52 #define SGI575_SDS_CPU_INFO_PRIMARY_POS 0
53 
54 /*
55  * Platform information:
56  * Structure, field masks and offsets for the SGI575_SDS_PLATFORM_ID
57  * structure.
58  */
59 struct sgi575_sds_platid {
60     /* Subsystem part number */
61     uint32_t platform_identifier;
62     /* Platform type information */
63     uint32_t platform_type_identifier;
64 };
65 
66 #define SGI575_SDS_PLATID_PARTNO_MASK 0xFFF
67 #define SGI575_SDS_PLATID_DESIGNER_MASK 0xFF000
68 #define SGI575_SDS_PLATID_REV_MINOR_MASK 0xF00000
69 #define SGI575_SDS_PLATID_REV_MAJOR_MASK 0xF000000
70 #define SGI575_SDS_PLATID_CONFIG_MASK 0xF0000000
71 #define SGI575_SDS_PLATID_TYPE_MASK 0xF
72 
73 #define SGI575_SDS_PLATID_PARTNO_POS 0
74 #define SGI575_SDS_PLATID_DESIGNER_POS 12
75 #define SGI575_SDS_PLATID_REV_MINOR_POS 20
76 #define SGI575_SDS_PLATID_REV_MAJOR_POS 24
77 #define SGI575_SDS_PLATID_CONFIG_POS 28
78 
79 #define SGI575_SDS_PLATID_TYPE_POS 0
80 
81 /*
82  * Field masks and offsets for the SGI575_SDS_FEATURE_AVAILABILITY structure.
83  */
84 #define SGI575_SDS_FEATURE_FIRMWARE_MASK 0x1
85 #define SGI575_SDS_FEATURE_DMC_MASK 0x2
86 #define SGI575_SDS_FEATURE_MESSAGING_MASK 0x4
87 
88 #define SGI575_SDS_FEATURE_FIRMWARE_POS 0
89 #define SGI575_SDS_FEATURE_DMC_POS 1
90 #define SGI575_SDS_FEATURE_MESSAGING_POS 2
91 
92 #endif /* SGI575_SDS_H */
93