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Searched refs:value (Results 1 – 25 of 102) sorted by relevance

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/SCP-firmware-master/framework/test/
A Dtest_fwk_macros.c43 unsigned int value; in test_fwk_macros_align_next() local
47 value = 0; in test_fwk_macros_align_next()
54 value = 0; in test_fwk_macros_align_next()
56 result = FWK_ALIGN_NEXT(value, interval); in test_fwk_macros_align_next()
59 value = 8; in test_fwk_macros_align_next()
64 value = 9; in test_fwk_macros_align_next()
72 unsigned int value; in test_fwk_macros_align_previous() local
76 value = 65; in test_fwk_macros_align_previous()
83 value = 0; in test_fwk_macros_align_previous()
88 value = 8; in test_fwk_macros_align_previous()
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A Dtest_fwk_list_get.c14 unsigned int value; member
27 assert(FWK_LIST_GET(node, struct container, slink)->value == 42); in test_slist_get()
35 assert(FWK_LIST_GET(node, struct container, dlink)->value == 42); in test_dlist_get()
/SCP-firmware-master/product/synquacer/module/f_i2c/src/
A Di2c_reg_access.c17 uint8_t value) in i2c_write_reg() argument
19 *((volatile uint8_t *)(base_addr + reg_addr)) = value; in i2c_write_reg()
28 void f_i2c_write_BSR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value) in f_i2c_write_BSR() argument
30 i2c_write_reg(packet_info->I2C_BASE_ADDR, I2C_REG_ADDR_BSR, value); in f_i2c_write_BSR()
33 void f_i2c_write_BCR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value) in f_i2c_write_BCR() argument
35 i2c_write_reg(packet_info->I2C_BASE_ADDR, I2C_REG_ADDR_BCR, value); in f_i2c_write_BCR()
38 void f_i2c_write_CCR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value) in f_i2c_write_CCR() argument
40 i2c_write_reg(packet_info->I2C_BASE_ADDR, I2C_REG_ADDR_CCR, value); in f_i2c_write_CCR()
43 void f_i2c_write_ADR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value) in f_i2c_write_ADR() argument
48 void f_i2c_write_DAR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value) in f_i2c_write_DAR() argument
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/SCP-firmware-master/product/synquacer/module/f_i2c/include/internal/
A Di2c_reg_access.h16 void f_i2c_write_BSR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value);
17 void f_i2c_write_BCR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value);
18 void f_i2c_write_CCR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value);
19 void f_i2c_write_ADR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value);
20 void f_i2c_write_DAR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value);
21 void f_i2c_write_CSR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value);
22 void f_i2c_write_FSR(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value);
23 void f_i2c_write_BC2R(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value);
63 uint8_t value);
93 void (*set_BSR)(I2C_ST_PACKET_INFO_t *packet_info, uint8_t value);
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/SCP-firmware-master/module/apremap/src/
A Dmod_apremap.c118 void *value, in read_ap_memory_1mb_window() argument
163 void *value, in mmio_ap_mem_read() argument
243 void *value, in write_ap_memory_1mb_window() argument
288 void *value, in mmio_ap_mem_write() argument
369 uint8_t value; in mmio_ap_mem_read_8() local
372 return value; in mmio_ap_mem_read_8()
377 uint16_t value; in mmio_ap_mem_read_16() local
380 return value; in mmio_ap_mem_read_16()
385 uint32_t value; in mmio_ap_mem_read_32() local
388 return value; in mmio_ap_mem_read_32()
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/SCP-firmware-master/product/synquacer/module/synquacer_system/src/
A Dtransaction_sw.c27 uint32_t value; in set_transactionsw_off() local
34 value = readl(transactionsw_reg_addr); in set_transactionsw_off()
37 value &= (~disable_bit); in set_transactionsw_off()
40 writel(transactionsw_reg_addr, value); in set_transactionsw_off()
52 uint32_t value; in set_transactionsw_on() local
59 value = readl(transactionsw_reg_addr); in set_transactionsw_on()
62 value |= (enable_bit); in set_transactionsw_on()
65 writel(transactionsw_reg_addr, value); in set_transactionsw_on()
A Dpmu_driver.c136 tmp |= (value << (8 * bit_field_offset)); in pmu_write_power_on_cycle()
146 uint8_t value = 0; in pmu_read_power_on_cycle() local
150 return value; in pmu_read_power_on_cycle()
162 return value; in pmu_read_power_on_cycle()
167 uint32_t value; in pmu_enable_int() local
183 uint32_t value; in pmu_disable_int() local
192 value &= (~(disable_bit)); in pmu_disable_int()
211 uint32_t value; in pmu_on_wakeup() local
237 if (value > PMU_PRIORITY_FIELD_MAX) in pmu_write_power_on_priority()
254 tmp |= (value << (8 * bit_field_offset)); in pmu_write_power_on_priority()
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A Dboot_ctl.c20 void set_memory_remap(uint32_t value) in set_memory_remap() argument
23 CONFIG_SOC_REG_ADDR_BOOT_CTL_TOP + REG_ADDR_OFFSET_BOOT_REMAP, value); in set_memory_remap()
28 uint8_t value = in get_dsw3_status() local
31 return (value & bit_mask); in get_dsw3_status()
/SCP-firmware-master/product/n1sdp/module/n1sdp_ddr_phy/src/
A Dmod_n1sdp_ddr_phy.c140 value = value & 0xFFFCFFFF; in adjust_per_rank_rptr_update_value()
147 value = value | 0x00010000; in adjust_per_rank_rptr_update_value()
160 value = (value & 0xFFFFFC00) | 0x104; in adjust_per_rank_rptr_update_value()
164 value = (value & 0xFFFFFC00) | 0x0FC; in adjust_per_rank_rptr_update_value()
175 value = value & 0xFFFCFFFF; in adjust_per_rank_rptr_update_value()
183 value = value | 0x00010000; in adjust_per_rank_rptr_update_value()
867 value = (value & 0xFFFF00FF) | 0x100; in n1sdp_ddr_phy_post_training_configure()
1035 value = (value & 0xFFFF00FF) | 0x100; in n1sdp_wrlvl_phy_obs_regs()
1080 value = (value & 0xFFFCFFFF) | (h << 16); in n1sdp_read_gate_phy_obs_regs()
1083 value = (value & 0xFFFF00FF) | 0x100; in n1sdp_read_gate_phy_obs_regs()
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/SCP-firmware-master/arch/arm/armv8-a/include/lib/
A Dmmio.h13 static inline void mmio_write_8(uintptr_t addr, uint8_t value) in mmio_write_8() argument
15 *(volatile uint8_t *)addr = value; in mmio_write_8()
23 static inline void mmio_write_16(uintptr_t addr, uint16_t value) in mmio_write_16() argument
25 *(volatile uint16_t *)addr = value; in mmio_write_16()
41 static inline void mmio_write_32(uintptr_t addr, uint32_t value) in mmio_write_32() argument
43 *(volatile uint32_t *)addr = value; in mmio_write_32()
51 static inline void mmio_write_64(uintptr_t addr, uint64_t value) in mmio_write_64() argument
53 *(volatile uint64_t *)addr = value; in mmio_write_64()
A Dutils_def.h87 #define round_boundary(value, boundary) ((__typeof__(value))((boundary)-1)) argument
89 #define round_up(value, boundary) \ argument
90 ((((value)-1) | round_boundary(value, boundary)) + 1)
92 #define round_down(value, boundary) ((value) & ~round_boundary(value, boundary)) argument
/SCP-firmware-master/product/n1sdp/module/n1sdp_sensor/src/
A Dn1sdp_sensor_driver.c20 int n1sdp_sensor_lib_sample(int32_t *value, enum sensor_type type, int offset) in n1sdp_sensor_lib_sample() argument
24 if (value == NULL) { in n1sdp_sensor_lib_sample()
30 *value = DEFAULT_TEMP_VALUE; in n1sdp_sensor_lib_sample()
34 *value = DEFAULT_VOLT_VALUE; in n1sdp_sensor_lib_sample()
A Dmod_n1sdp_sensor.c37 int32_t value; in n1sdp_sensor_timer_callback() local
43 if (value >= t_dev_ctx->config->alarm_threshold && in n1sdp_sensor_timer_callback()
44 value < t_dev_ctx->config->shutdown_threshold) { in n1sdp_sensor_timer_callback()
48 (int)value); in n1sdp_sensor_timer_callback()
49 } else if (value >= t_dev_ctx->config->shutdown_threshold) { in n1sdp_sensor_timer_callback()
53 (int)value); in n1sdp_sensor_timer_callback()
59 t_dev_ctx->sensor_data_buffer[t_dev_ctx->buf_index++] = value; in n1sdp_sensor_timer_callback()
69 status = n1sdp_sensor_lib_sample(&value, MOD_N1SDP_VOLT_SENSOR, 0); in n1sdp_sensor_timer_callback()
74 n1sdp_sensor_lib_sample(&value, MOD_N1SDP_VOLT_SENSOR, count); in n1sdp_sensor_timer_callback()
90 static int get_value(fwk_id_t element_id, mod_sensor_value_t *value) in get_value() argument
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/SCP-firmware-master/product/morello/module/morello_sensor/src/
A Dmorello_sensor_driver.c20 int morello_sensor_lib_sample(int32_t *value, enum sensor_type type, int offset) in morello_sensor_lib_sample() argument
24 if (value == NULL) in morello_sensor_lib_sample()
29 *value = DEFAULT_TEMP_VALUE; in morello_sensor_lib_sample()
33 *value = DEFAULT_VOLT_VALUE; in morello_sensor_lib_sample()
A Dmod_morello_sensor.c48 int32_t value; in morello_sensor_timer_callback() local
53 morello_sensor_lib_sample(&value, MOD_MORELLO_TEMP_SENSOR, count); in morello_sensor_timer_callback()
55 if (value >= t_dev_ctx->config->alarm_threshold && in morello_sensor_timer_callback()
56 value < t_dev_ctx->config->shutdown_threshold) { in morello_sensor_timer_callback()
60 (int)value); in morello_sensor_timer_callback()
61 } else if (value >= t_dev_ctx->config->shutdown_threshold) { in morello_sensor_timer_callback()
65 (int)value); in morello_sensor_timer_callback()
76 t_dev_ctx->sensor_data_buffer[t_dev_ctx->buf_index++] = value; in morello_sensor_timer_callback()
95 v_dev_ctx->sensor_data_buffer[v_dev_ctx->buf_index++] = value; in morello_sensor_timer_callback()
108 static int get_value(fwk_id_t element_id, mod_sensor_value_t *value) in get_value() argument
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/SCP-firmware-master/product/synquacer/module/synquacer_rom/src/
A Dsynquacer_init.c67 uint32_t i, value; in fw_sysoc_init() local
81 value = readl(init_sysoc_addr_infos[i] + REG_ADDR_RSTSTA); in fw_sysoc_init()
82 if (value == 0) in fw_sysoc_init()
88 (init_sysoc_reset_infos[i] & value)); in fw_sysoc_init()
134 void fw_clear_clkforce(uint32_t value) in fw_clear_clkforce() argument
146 PIK_SYSTEM->CLKFORCE_CLR = value; in fw_clear_clkforce()
196 uint32_t i, value; in fw_sram_sysoc_init() local
202 value = readl(init_sysoc_addr_infos[i] + REG_ADDR_RSTSTA); in fw_sram_sysoc_init()
203 if (value == 0) in fw_sram_sysoc_init()
209 (init_sysoc_reset_infos[i] & value)); in fw_sram_sysoc_init()
/SCP-firmware-master/module/apremap/include/
A Dmod_apremap.h99 void (*mmio_ap_mem_write_8)(uint64_t addr, uint8_t value);
107 void (*mmio_ap_mem_write_16)(uint64_t addr, uint16_t value);
115 void (*mmio_ap_mem_write_32)(uint64_t addr, uint32_t value);
123 void (*mmio_ap_mem_write_64)(uint64_t addr, uint64_t value);
/SCP-firmware-master/product/n1sdp/module/n1sdp_dmc620/src/
A Dmod_n1sdp_dmc620.c396 value = (value & 0xFFFFF9FF) | (0 << 16); in ddr_training()
457 value = (value & 0xFFFFF9FF) | (0 << 16); in ddr_training()
923 value = 0; in dmc620_config()
934 value = 0; in dmc620_config()
965 value = 0; in dmc620_config()
975 value = 0; in dmc620_config()
984 value = 0; in dmc620_config()
995 value = 0; in dmc620_config()
1004 value = 0; in dmc620_config()
1013 value = 0; in dmc620_config()
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A Ddimm_spd.h386 int dimm_spd_address_control(uint32_t *value, struct dimm_info *info);
396 int dimm_spd_format_control(uint32_t *value);
407 int dimm_spd_memory_type(uint32_t *value, struct dimm_info *info);
417 int dimm_spd_t_refi(uint32_t *value);
427 int dimm_spd_t_rfc(uint32_t *value);
437 int dimm_spd_t_rcd(uint32_t *value);
447 int dimm_spd_t_ras(uint32_t *value);
457 int dimm_spd_t_rp(uint32_t *value);
467 int dimm_spd_t_rrd(uint32_t *value);
478 int dimm_spd_t_wtr(uint32_t *value, struct dimm_info *info);
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/SCP-firmware-master/product/rcar/module/rcar_sd_clock/src/
A Dmod_rcar_sd_clock.c68 uint32_t value; in do_sd_clock_set_rate() local
82 value &= (~rate_entry->divider_mask); in do_sd_clock_set_rate()
83 value |= rate_entry->divider; in do_sd_clock_set_rate()
87 value &= (~CPG_CON_MASK); in do_sd_clock_set_rate()
160 uint32_t value; in sd_clock_set_state() local
168 value = mmio_read_32(ctx->config->control_reg); in sd_clock_set_state()
170 value &= ~(BIT(ctx->config->stop_clk_bit)); in sd_clock_set_state()
172 value |= BIT(ctx->config->stop_clk_bit); in sd_clock_set_state()
221 uint32_t value = 0; in sd_clock_hw_initial_set_state() local
250 value &= (CPG_CON_MASK); in sd_clock_hw_initial_set_state()
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/SCP-firmware-master/product/synquacer/module/synquacer_system/include/internal/
A Dgpio.h20 void gpio_set_data(void *gpio_base_addr, uint32_t idx, uint8_t value);
22 void gpio_set_direction(void *gpio_base_addr, uint32_t idx, uint8_t value);
24 void gpio_set_function(void *gpio_base_addr, uint32_t idx, uint8_t value);
A Dpmu.h23 void pmu_write_power_on_cycle(uint8_t pd_no, uint8_t value);
30 void pmu_write_power_on_priority(uint8_t pd_no, uint8_t value);
31 void pmu_write_pwr_cyc_sel(uint32_t value);
/SCP-firmware-master/product/morello/module/dmc_bing/src/
A Dmorello_ddr_phy.c871 uint32_t value; in morello_wrlvl_phy_obs_regs() local
891 value = (value & 0xFFFCFFFF) | (h << 16); in morello_wrlvl_phy_obs_regs()
894 value = (value & 0xFFFF00FF) | 0x100; in morello_wrlvl_phy_obs_regs()
899 value = (value & 0xFFFF00FF) | (j << 8); in morello_wrlvl_phy_obs_regs()
904 value = (value & 0xFFF0FFFF) | (j << 16); in morello_wrlvl_phy_obs_regs()
941 value = (value & 0xFFFCFFFF) | (h << 16); in morello_read_gate_phy_obs_regs()
944 value = (value & 0xFFFF00FF) | 0x100; in morello_read_gate_phy_obs_regs()
969 value = (value & 0xFFFCFFFF) | (h << 16); in morello_read_eye_phy_obs_regs()
972 value = (value & 0xFFFF00FF) | 0x100; in morello_read_eye_phy_obs_regs()
977 value = (value & 0xFF00FFFF) | (j << 16); in morello_read_eye_phy_obs_regs()
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A Dmod_dmc_bing.c452 value = (value & 0xFFFFF9FF) | (0 << 16); in ddr_training()
514 value = (value & 0xFFFFF9FF) | (0 << 16); in ddr_training()
1105 value = 0; in dmc_bing_pre_phy_init()
1117 value = 0; in dmc_bing_pre_phy_init()
1148 value = 0; in dmc_bing_pre_phy_init()
1163 value = 0; in dmc_bing_pre_phy_init()
1167 value = 0; in dmc_bing_pre_phy_init()
1173 value = 0; in dmc_bing_pre_phy_init()
1177 value = 0; in dmc_bing_pre_phy_init()
1181 value = 0; in dmc_bing_pre_phy_init()
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A Ddimm_spd.h386 int dimm_spd_address_control(uint32_t *value, struct dimm_info *info);
396 int dimm_spd_format_control(uint32_t *value);
407 int dimm_spd_memory_type(uint32_t *value, struct dimm_info *info);
417 void dimm_spd_t_refi(uint32_t *value);
426 void dimm_spd_t_rfc(uint32_t *value);
435 void dimm_spd_t_rcd(uint32_t *value);
444 void dimm_spd_t_ras(uint32_t *value);
453 void dimm_spd_t_rp(uint32_t *value);
462 void dimm_spd_t_rrd(uint32_t *value);
472 void dimm_spd_t_wtr(uint32_t *value, struct dimm_info *info);
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