Home
last modified time | relevance | path

Searched refs:ALIGN (Results 1 – 21 of 21) sorted by relevance

/arm-trusted-firmware-2.8.0/include/common/
A Dbl_common.ld.h25 . = ALIGN(STRUCT_ALIGN); \
31 . = ALIGN(STRUCT_ALIGN); \
37 . = ALIGN(STRUCT_ALIGN); \
44 . = ALIGN(STRUCT_ALIGN); \
53 . = ALIGN(STRUCT_ALIGN); \
59 . = ALIGN(STRUCT_ALIGN); \
70 . = ALIGN(STRUCT_ALIGN); \
82 . = ALIGN(16); \
111 .data . : ALIGN(DATA_ALIGN) { \
170 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
[all …]
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/include/
A Dplat.ld.S19 ASSERT(. == ALIGN(PAGE_SIZE),
32 .incbin_sram : ALIGN(PAGE_SIZE) {
36 . = ALIGN(PAGE_SIZE); define
42 .text_sram : ALIGN(PAGE_SIZE) {
47 . = ALIGN(PAGE_SIZE); define
53 .data_sram : ALIGN(PAGE_SIZE) {
57 . = ALIGN(PAGE_SIZE); define
63 .stack_sram : ALIGN(PAGE_SIZE) {
77 ASSERT(. == ALIGN(64 * 1024),
87 . = ALIGN(4096); define
/arm-trusted-firmware-2.8.0/bl31/
A Dbl31.ld.S31 ASSERT(. == ALIGN(PAGE_SIZE),
42 . = ALIGN(PAGE_SIZE); define
57 . = ALIGN(8); define
60 . = ALIGN(PAGE_SIZE); define
73 . = ALIGN(8); define
83 . = ALIGN(PAGE_SIZE); define
104 spm_shim_exceptions : ALIGN(PAGE_SIZE) {
107 . = ALIGN(PAGE_SIZE); define
133 . = ALIGN(PAGE_SIZE); define
140 ASSERT(. == ALIGN(PAGE_SIZE),
[all …]
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3288/include/
A Dplat_sp_min.ld.S19 ASSERT(. == ALIGN(PAGE_SIZE),
22 .text_sram : ALIGN(PAGE_SIZE) {
27 . = ALIGN(PAGE_SIZE); define
33 .data_sram : ALIGN(PAGE_SIZE) {
37 . = ALIGN(PAGE_SIZE); define
43 .stack_sram : ALIGN(PAGE_SIZE) {
57 ASSERT(. == ALIGN(64 * 1024),
/arm-trusted-firmware-2.8.0/bl32/sp_min/
A Dsp_min.ld.S25 ASSERT(. == ALIGN(PAGE_SIZE),
34 . = ALIGN(PAGE_SIZE); define
54 . = ALIGN(8); define
57 . = ALIGN(PAGE_SIZE); define
70 . = ALIGN(8); define
81 . = ALIGN(PAGE_SIZE); define
114 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
129 . = ALIGN(PAGE_SIZE); define
/arm-trusted-firmware-2.8.0/plat/mediatek/include/
A Dplat.ld.rodata.inc11 . = ALIGN(32);
14 . = ALIGN(32);
18 . = ALIGN(8);
22 . = ALIGN(32);
26 . = ALIGN(8);
/arm-trusted-firmware-2.8.0/bl32/tsp/
A Dtsp.ld.S23 ASSERT(. == ALIGN(PAGE_SIZE),
32 . = ALIGN(PAGE_SIZE); define
42 . = ALIGN(PAGE_SIZE); define
62 . = ALIGN(PAGE_SIZE); define
91 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
100 . = ALIGN(PAGE_SIZE); define
/arm-trusted-firmware-2.8.0/bl2u/
A Dbl2u.ld.S24 ASSERT(. == ALIGN(PAGE_SIZE),
33 . = ALIGN(PAGE_SIZE); define
52 . = ALIGN(PAGE_SIZE); define
71 . = ALIGN(PAGE_SIZE); define
94 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
103 . = ALIGN(PAGE_SIZE); define
/arm-trusted-firmware-2.8.0/bl2/
A Dbl2.ld.S22 ASSERT(. == ALIGN(PAGE_SIZE),
35 . = ALIGN(PAGE_SIZE); define
54 . = ALIGN(PAGE_SIZE); define
73 . = ALIGN(PAGE_SIZE); define
96 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
105 . = ALIGN(PAGE_SIZE); define
A Dbl2_el3.ld.S36 ASSERT(. == ALIGN(PAGE_SIZE),
40 ASSERT(. == ALIGN(PAGE_SIZE),
53 . = ALIGN(PAGE_SIZE); define
63 . = ALIGN(PAGE_SIZE); define
88 . = ALIGN(PAGE_SIZE); define
99 ASSERT(BL2_RW_BASE == ALIGN(PAGE_SIZE),
134 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
143 . = ALIGN(PAGE_SIZE); define
/arm-trusted-firmware-2.8.0/bl1/
A Dbl1.ld.S30 ASSERT(. == ALIGN(PAGE_SIZE),
39 . = ALIGN(PAGE_SIZE); define
68 . = ALIGN(16); define
87 . = ALIGN(16); define
95 ASSERT(BL1_RW_BASE == ALIGN(PAGE_SIZE),
113 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
122 . = ALIGN(PAGE_SIZE); define
/arm-trusted-firmware-2.8.0/include/plat/arm/common/
A Darm_tzc_dram.ld.S18 ASSERT(. == ALIGN(PAGE_SIZE),
20 el3_tzc_dram (NOLOAD) : ALIGN(PAGE_SIZE) {
25 . = ALIGN(PAGE_SIZE); define
A Darm_reclaim_init.ld.S13 . = ALIGN(PAGE_SIZE); define
17 INIT_CODE_END_ALIGNED = ALIGN(PAGE_SIZE);
40 . = ALIGN(PAGE_SIZE); \
/arm-trusted-firmware-2.8.0/services/std_svc/rmmd/trp/
A Dlinker.lds28 . = ALIGN(8);
32 . = ALIGN(PAGE_SIZE_4K);
38 . = ALIGN(PAGE_SIZE_4K);
/arm-trusted-firmware-2.8.0/plat/st/stm32mp1/
A Dstm32mp1.ld.S31 . = ALIGN(4); define
37 . = ALIGN(PAGE_SIZE); define
/arm-trusted-firmware-2.8.0/plat/arm/board/arm_fpga/
A Dbuild_axf.ld.S35 ASSERT(. == ALIGN(PAGE_SIZE), "BL31_BASE is not page aligned");
40 ASSERT(. == ALIGN(8), "DTB address is not 8-byte aligned");
/arm-trusted-firmware-2.8.0/plat/socionext/synquacer/include/
A Dplat.ld.S26 sp_xlat_table (NOLOAD) : ALIGN(PAGE_SIZE) {
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/m0/src/
A Drk3399m0.ld.S21 . = ALIGN(8); define
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3328/include/
A Dplat.ld.S23 ASSERT(. == ALIGN(64 * 1024),
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3368/include/
A Dplat.ld.S23 ASSERT(. == ALIGN(64 * 1024),
/arm-trusted-firmware-2.8.0/plat/rockchip/px30/include/
A Dplat.ld.S24 ASSERT(. == ALIGN(64 * 1024),

Completed in 16 milliseconds