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Searched refs:APU_PLL_BASE (Results 1 – 1 of 1) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/apusys/
A Dapupwr_clkctl_def.h80 #define APU_PLL_BASE (APUSYS_APU_PLL_BASE) macro
81 #define APU_PLL4H_PLL1_CON0 (APU_PLL_BASE + 0x008)
82 #define APU_PLL4H_PLL1_CON1 (APU_PLL_BASE + 0x00C)
83 #define APU_PLL4H_PLL1_CON3 (APU_PLL_BASE + 0x014)
85 #define APU_PLL4H_PLL2_CON0 (APU_PLL_BASE + 0x018)
86 #define APU_PLL4H_PLL2_CON1 (APU_PLL_BASE + 0x01C)
87 #define APU_PLL4H_PLL2_CON3 (APU_PLL_BASE + 0x024)
89 #define APU_PLL4H_PLL3_CON0 (APU_PLL_BASE + 0x028)
90 #define APU_PLL4H_PLL3_CON1 (APU_PLL_BASE + 0x02C)
91 #define APU_PLL4H_PLL3_CON3 (APU_PLL_BASE + 0x034)
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