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Searched refs:AXI_DCMPAREACRA0 (Results 1 – 4 of 4) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/renesas/common/include/registers/
A Daxi_registers.h34 #define AXI_DCMPAREACRA0 (AXI_BASE + 0x4100U) macro
/arm-trusted-firmware-2.8.0/plat/renesas/rzg/
A Dbl2_plat_setup.c218 mmio_write_32(AXI_DCMPAREACRA0 + 0x8U * no, reg); in bl2_lossy_setting()
220 mmio_write_32(AXI_DCMPAREACRA0 + 0x8U * no, reg | enable); in bl2_lossy_setting()
223 info.a0 = mmio_read_32(AXI_DCMPAREACRA0 + 0x8U * no); in bl2_lossy_setting()
231 mmio_read_32(AXI_DCMPAREACRA0 + 0x8U * no), in bl2_lossy_setting()
/arm-trusted-firmware-2.8.0/plat/renesas/rcar/
A Dbl2_plat_setup.c223 mmio_write_32(AXI_DCMPAREACRA0 + 0x8 * no, reg); in bl2_lossy_setting()
225 mmio_write_32(AXI_DCMPAREACRA0 + 0x8 * no, reg | enable); in bl2_lossy_setting()
228 info.a0 = mmio_read_32(AXI_DCMPAREACRA0 + 0x8 * no); in bl2_lossy_setting()
236 mmio_read_32(AXI_DCMPAREACRA0 + 0x8 * no), in bl2_lossy_setting()
/arm-trusted-firmware-2.8.0/plat/renesas/common/include/
A Drcar_def.h293 #define AXI_DCMPAREACRA0 (0xE6784100U) macro

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