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Searched refs:CDRU_MISC_RESET_CONTROL (Results 1 – 8 of 8) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/brcm/board/common/
A Dtimer_sync.c62 mmio_setbits_32(CDRU_MISC_RESET_CONTROL, in brcm_timer_sync_init()
/arm-trusted-firmware-2.8.0/plat/brcm/board/stingray/driver/
A Dusb.c26 mmio_setbits_32(CDRU_MISC_RESET_CONTROL, CDRU_PM_RESET_N_R); in usb_pm_rescal_init()
236 mmio_setbits_32(CDRU_MISC_RESET_CONTROL, CDRU_USBSS_RESET_N); in xhci_phy_init()
/arm-trusted-firmware-2.8.0/plat/brcm/board/stingray/src/
A Dbl2_setup.c145 mmio_clrbits_32(CDRU_MISC_RESET_CONTROL, CDRU_PCIE_RESET_N_R); in brcm_stingray_pcie_reset()
146 mmio_setbits_32(CDRU_MISC_RESET_CONTROL, CDRU_PCIE_RESET_N_R); in brcm_stingray_pcie_reset()
A Dihost_pm.c152 mmio_setbits_32(CDRU_MISC_RESET_CONTROL, rst); in ihost_power_on_cluster()
A Dbl31_setup.c214 mmio_clrbits_32(CDRU_MISC_RESET_CONTROL, CDRU_SATA_RESET_N); in brcm_stingray_sata_init()
215 mmio_setbits_32(CDRU_MISC_RESET_CONTROL, CDRU_SATA_RESET_N); in brcm_stingray_sata_init()
A Dpaxb.c478 mmio_setbits_32(CDRU_MISC_RESET_CONTROL, in pcie_ss_reset()
/arm-trusted-firmware-2.8.0/plat/brcm/board/stingray/include/
A Dcrmu_def.h92 #define CDRU_MISC_RESET_CONTROL CDRU_BASE_ADDR macro
/arm-trusted-firmware-2.8.0/drivers/brcm/
A Dchimp.c130 mmio_setbits_32(CDRU_MISC_RESET_CONTROL, in bcm_chimp_nitro_reset()

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