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Searched refs:CLK_SCP_CFG_0 (Results 1 – 5 of 5) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/spm/
A Dmt_spm.c39 #define CLK_SCP_CFG_0 (TOPCKGEN_BASE + 0x264) macro
91 mmio_setbits_32(CLK_SCP_CFG_0, SPM_CK_CONTROL_EN); in spm_boot_init()
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/spm/
A Dmt_spm.c39 #define CLK_SCP_CFG_0 (TOPCKGEN_BASE + 0x200) macro
95 mmio_setbits_32(CLK_SCP_CFG_0, SPM_CK_CONTROL_EN); in spm_boot_init()
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/spm/
A Dmt_spm.c40 #define CLK_SCP_CFG_0 (TOPCKGEN_BASE + 0x200) macro
101 mmio_setbits_32(CLK_SCP_CFG_0, SPM_CK_CONTROL_EN); in spm_boot_init()
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/include/
A Dplatform_def.h43 #define CLK_SCP_CFG_0 (TOPCKGEN_BASE + 0x200) macro
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/drivers/spm/
A Dspm.c354 mmio_setbits_32(CLK_SCP_CFG_0, SPM_CK_OFF_CONTROL); in spm_boot_init()

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