Searched refs:CPU1 (Results 1 – 8 of 8) sorted by relevance
38 cpu = <&CPU1>;57 CPU1: cpu1@100 { label
33 cpu = <&CPU1>;118 CPU1:cpu@100 { label530 cpu = <&CPU1>;
77 #define CPU_1 CPU(1, c1, p1) /* CPU1: 0.1; 1.0 */
112 CPU1:cpu@100 { label
111 CPU1:cpu@100 { label
69 CPU1, enumerator204 if (plat_marvell_cpu_powerdown(CPU1) == -1) in plat_marvell_early_cpu_powerdown()
250 CPU1 | 3 | |
2159 CPU1 updates its per-CPU field of the ``bakery_lock_t`` structure with data cache2160 disabled. CPU1 then issues a DCIVAC operation to invalidate any stale copies of2215 | Lock_0 | for CPU12218 | Lock_1 | for CPU12223 | Lock_N | for CPU12232 operation on Lock_N, the corresponding ``bakery_info_t`` in both CPU0 and CPU1
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