Home
last modified time | relevance | path

Searched refs:CTLR_ENABLE_G1NS_BIT (Results 1 – 3 of 3) sorted by relevance

/arm-trusted-firmware-2.8.0/drivers/arm/gic/v3/
A Dgic600_multichip.c49 CTLR_ENABLE_G1NS_BIT | GICD_CTLR_RWP_BIT)) != 0) { in set_gicd_dchipr_rt_owner()
85 CTLR_ENABLE_G1NS_BIT | GICD_CTLR_RWP_BIT)) != 0) { in set_gicd_chipr_n()
323 CTLR_ENABLE_G1NS_BIT | GICD_CTLR_RWP_BIT)) != 0) { in gic600_multichip_init()
A Dgicv3_main.c200 CTLR_ENABLE_G1NS_BIT, in gicv3_distif_init()
841 CTLR_ENABLE_G1NS_BIT, in gicv3_distif_init_restore()
/arm-trusted-firmware-2.8.0/include/drivers/arm/
A Dgicv3.h132 #define CTLR_ENABLE_G1NS_BIT BIT_32(CTLR_ENABLE_G1NS_SHIFT) macro

Completed in 7 milliseconds