Searched refs:DBSC_DBPDLK_0 (Results 1 – 4 of 4) sorted by relevance
| /arm-trusted-firmware-2.8.0/drivers/renesas/common/ddr/ddr_a/ |
| A D | ddr_init_v3m.c | 85 mmio_write_32(DBSC_DBPDLK_0, 0x0000A55A); in init_ddr_v3m_1600()
329 mmio_write_32(DBSC_DBPDLK_0, 0x00000000); in init_ddr_v3m_1600()
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| A D | ddr_init_d3.c | 64 mmio_write_32(DBSC_DBPDLK_0, 0x0000A55A); in init_ddr_d3_1866()
319 mmio_write_32(DBSC_DBPDLK_0, 0x00000000); in init_ddr_d3_1866()
412 mmio_write_32(DBSC_DBPDLK_0, 0x0000A55A); in init_ddr_d3_1600()
665 mmio_write_32(DBSC_DBPDLK_0, 0x00000000); in init_ddr_d3_1600()
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| A D | ddr_init_e3.c | 177 mmio_write_32(DBSC_DBPDLK_0, 0x0000A55A); in init_ddr()
789 mmio_write_32(DBSC_DBPDLK_0, 0x00000000); in init_ddr()
980 mmio_write_32(DBSC_DBPDLK_0, 0x0000A55A); in recovery_from_backup_mode()
1627 mmio_write_32(DBSC_DBPDLK_0, 0x00000000); in recovery_from_backup_mode()
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| /arm-trusted-firmware-2.8.0/drivers/renesas/common/ |
| A D | ddr_regs.h | 127 #define DBSC_DBPDLK_0 0xE6790620U macro
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