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Searched refs:DDR_PCTL_DFILPCFG0 (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/rockchip/rk3368/drivers/ddr/
A Dddr_rk3368.h123 #define DDR_PCTL_DFILPCFG0 0x2f0 macro
A Dddr_rk3368.c312 pctl_tim->DFILPCFG0 = mmio_read_32(DDR_PCTL_BASE + DDR_PCTL_DFILPCFG0); in ddr_reg_save()

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