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Searched refs:DFLL_OUTPUT_CFG_CLK_EN_BIT (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t210/
A Dplat_psci_handlers.c235 if (cfg & DFLL_OUTPUT_CFG_CLK_EN_BIT) { in tegra_soc_pwr_domain_suspend()
514 if (cfg & DFLL_OUTPUT_CFG_CLK_EN_BIT) { in tegra_soc_pwr_domain_on_finish()
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/include/t210/
A Dtegra_def.h264 #define DFLL_OUTPUT_CFG_CLK_EN_BIT (U(1) << 6) macro

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