Searched refs:DIV_PLL1DIVP (Results 1 – 2 of 2) sorted by relevance
| /arm-trusted-firmware-2.8.0/include/dt-bindings/clock/ |
| A D | stm32mp13-clksrc.h | 40 #define DIV_PLL1DIVP 0 macro
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| /arm-trusted-firmware-2.8.0/drivers/st/clk/ |
| A D | clk-stm32mp13.c | 845 DIV_CFG(DIV_PLL1DIVP, RCC_PLL1CFGR2, 0, 7, 0, NULL, DIV_NO_BIT_RDY),
1797 STM32_COMPOSITE(_PLL1P, PLL1_P, _CK_PLL1, CLK_IS_CRITICAL, GATE_PLL1_DIVP, DIV_PLL1DIVP),
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