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Searched refs:DPLL_WORK_SLOW_MODE (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/rockchip/rk3368/drivers/ddr/
A Dddr_rk3368.h230 #define DPLL_WORK_SLOW_MODE ((0x3 << (8 + 16)) | (1 << 8)) macro
A Dddr_rk3368.c392 p_ddr_reg->dpllslowmode = DPLL_WORK_SLOW_MODE | DPLL_POWER_DOWN; in ddr_reg_save()

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