Searched refs:DRAM_SEL_CFG (Results 1 – 1 of 1) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/imx/imx8m/ddr/
A D	clock.c	13 #define DRAM_SEL_CFG (IMX_CCM_BASE + 0x9800) macro 32 mmio_write_32(DRAM_SEL_CFG + 0x4, BIT(24)); in ddr_pll_bypass_100mts() 46 mmio_write_32(DRAM_SEL_CFG + 0x4, BIT(24)); in ddr_pll_bypass_400mts() 51 mmio_write_32(DRAM_SEL_CFG + 0x8, BIT(24)); in ddr_pll_unbypass()

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