Home
last modified time | relevance | path

Searched refs:DVFSRC_DDR_QOS0 (Results 1 – 6 of 6) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/spm/
A Dmt_spm_vcorefs.h76 #define DVFSRC_DDR_QOS0 (DVFSRC_BASE + 0xA34) macro
A Dmt_spm_vcorefs.c70 { DVFSRC_DDR_QOS0, 0x00000019 },
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/spm/
A Dmt_spm_vcorefs.c35 { DVFSRC_DDR_QOS0, 0x00000019 },
A Dmt_spm_vcorefs.h230 #define DVFSRC_DDR_QOS0 (DVFSRC_BASE + 0xA34) macro
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/spm/
A Dmt_spm_vcorefs.c226 {DVFSRC_DDR_QOS0, 0x00000019},
A Dmt_spm_vcorefs.h216 #define DVFSRC_DDR_QOS0 (DVFSRC_BASE + 0xA34) macro

Completed in 9 milliseconds