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Searched refs:DVFSRC_DDR_QOS2 (Results 1 – 6 of 6) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/spm/
A Dmt_spm_vcorefs.h78 #define DVFSRC_DDR_QOS2 (DVFSRC_BASE + 0xA3C) macro
A Dmt_spm_vcorefs.c72 { DVFSRC_DDR_QOS2, 0x00000033 },
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/spm/
A Dmt_spm_vcorefs.c37 { DVFSRC_DDR_QOS2, 0x00000033 },
A Dmt_spm_vcorefs.h232 #define DVFSRC_DDR_QOS2 (DVFSRC_BASE + 0xA3C) macro
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/spm/
A Dmt_spm_vcorefs.c228 {DVFSRC_DDR_QOS2, 0x00000033},
A Dmt_spm_vcorefs.h218 #define DVFSRC_DDR_QOS2 (DVFSRC_BASE + 0xA3C) macro

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