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Searched refs:DVFSRC_RECORD_0_2 (Results 1 – 3 of 3) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/spm/
A Dmt_spm_vcorefs.h95 #define DVFSRC_RECORD_0_2 (DVFSRC_BASE + 0xAF8) macro
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/spm/
A Dmt_spm_vcorefs.h279 #define DVFSRC_RECORD_0_2 (DVFSRC_BASE + 0xAF8) macro
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/spm/
A Dmt_spm_vcorefs.h265 #define DVFSRC_RECORD_0_2 (DVFSRC_BASE + 0xAF8) macro

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