Searched refs:GENMASK_32 (Results 1 – 13 of 13) sorted by relevance
| /arm-trusted-firmware-2.8.0/drivers/st/fmc/ |
| A D | stm32_fmc2_nand.c | 54 #define FMC2_PCR_PWID_MASK GENMASK_32(5, 4)
60 #define FMC2_PCR_TCLR_MASK GENMASK_32(12, 9)
63 #define FMC2_PCR_TAR_MASK GENMASK_32(16, 13)
66 #define FMC2_PCR_ECCSS_MASK GENMASK_32(19, 17)
89 #define FMC2_BCHICR_CLEAR_IRQ GENMASK_32(4, 0)
93 #define FMC2_BCHDSR0_DEN_MASK GENMASK_32(7, 4)
96 #define FMC2_BCHDSR1_EBP1_MASK GENMASK_32(12, 0)
100 #define FMC2_BCHDSR2_EBP3_MASK GENMASK_32(12, 0)
104 #define FMC2_BCHDSR3_EBP5_MASK GENMASK_32(12, 0)
108 #define FMC2_BCHDSR4_EBP7_MASK GENMASK_32(12, 0)
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| /arm-trusted-firmware-2.8.0/plat/st/stm32mp1/ |
| A D | stm32mp1_def.h | 310 #define STM32MP1_ETZPC_TZMA_ALL_SECURE GENMASK_32(9, 0)
456 #define CFG0_OTP_MODE_MASK GENMASK_32(9, 0)
469 #define PART_NUMBER_OTP_PART_MASK GENMASK_32(11, 0)
472 #define PART_NUMBER_OTP_PART_MASK GENMASK_32(7, 0)
478 #define PACKAGE_OTP_PKG_MASK GENMASK_32(29, 27)
495 #define NAND_PAGE_SIZE_MASK GENMASK_32(30, 29)
502 #define NAND_BLOCK_SIZE_MASK GENMASK_32(28, 27)
509 #define NAND_BLOCK_NB_MASK GENMASK_32(26, 19)
518 #define NAND_ECC_BIT_NB_MASK GENMASK_32(17, 15)
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| /arm-trusted-firmware-2.8.0/drivers/scmi-msg/ |
| A D | clock.h | 117 #define SCMI_CLOCK_DESCRIBE_RATES_REMAINING_MASK GENMASK_32(31, 16)
123 #define SCMI_CLOCK_DESCRIBE_RATES_COUNT_MASK GENMASK_32(11, 0)
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| A D | smt.c | 55 #define SMT_MSG_ID_MASK GENMASK_32(7, 0)
58 #define SMT_MSG_TYPE_MASK GENMASK_32(9, 8)
61 #define SMT_MSG_PROT_ID_MASK GENMASK_32(17, 10)
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| A D | reset_domain.h | 40 #define SCMI_RESET_DOMAIN_COUNT_MASK GENMASK_32(15, 0)
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| /arm-trusted-firmware-2.8.0/include/lib/ |
| A D | smccc.h | 62 #define SOC_ID_JEP_106_BANK_IDX_MASK GENMASK_32(30, 24)
64 #define SOC_ID_JEP_106_ID_CODE_MASK GENMASK_32(23, 16)
66 #define SOC_ID_IMPL_DEF_MASK GENMASK_32(15, 0)
73 #define SOC_ID_REV_MASK GENMASK_32(30, 0)
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| A D | utils_def.h | 37 #define GENMASK_32(h, l) \ macro
43 #define GENMASK_32(h, l) \ macro
53 #define GENMASK GENMASK_32
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| /arm-trusted-firmware-2.8.0/drivers/mtd/nand/ |
| A D | raw_nand.c | 330 if (page.nb_ecc_bits != GENMASK_32(7, 0)) { in nand_read_param_page()
385 if ((bbm_marker[0] != GENMASK_32(7, 0)) || in nand_mtd_block_is_bad()
386 (bbm_marker[1] != GENMASK_32(7, 0))) { in nand_mtd_block_is_bad()
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| A D | spi_nand.c | 247 if ((bbm_marker[0] != GENMASK_32(7, 0)) || in spi_nand_mtd_block_is_bad()
248 (bbm_marker[1] != GENMASK_32(7, 0))) { in spi_nand_mtd_block_is_bad()
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| /arm-trusted-firmware-2.8.0/drivers/st/spi/ |
| A D | stm32_qspi.c | 57 #define QSPI_CR_PRESCALER_MASK GENMASK_32(31, 24)
62 #define QSPI_DCR_CSHT_MASK GENMASK_32(10, 8)
64 #define QSPI_DCR_FSIZE_MASK GENMASK_32(20, 16)
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| /arm-trusted-firmware-2.8.0/include/dt-bindings/clock/ |
| A D | stm32mp13-clksrc.h | 31 #define CLK_ID_MASK GENMASK_32(19, 11)
35 #define CLK_DIV_MASK GENMASK_32(9, 4)
37 #define CLK_SEL_MASK GENMASK_32(3, 0)
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| /arm-trusted-firmware-2.8.0/plat/allwinner/common/ |
| A D | sunxi_common.c | 186 return reg & GENMASK_32(7, 0); in plat_get_soc_revision()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/apusys/ |
| A D | apupwr_clkctl_def.h | 146 #define DDS_MASK GENMASK_32(21, 0)
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