Searched refs:GICC_CTLR (Results 1 – 16 of 16) sorted by relevance
| /arm-trusted-firmware-2.8.0/drivers/arm/gic/v2/ |
| A D | gicv2_private.h | 62 return mmio_read_32(base + GICC_CTLR); in gicc_read_ctlr()
116 mmio_write_32(base + GICC_CTLR, val); in gicc_write_ctlr()
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| /arm-trusted-firmware-2.8.0/plat/nvidia/tegra/include/ |
| A D | plat_macros.S | 39 ldr w10, [x16, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/amlogic/common/include/ |
| A D | plat_macros.S | 41 ldr w10, [x17, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/xilinx/zynqmp/aarch64/ |
| A D | zynqmp_helpers.S | 35 str w0, [x1, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/renesas/common/include/ |
| A D | plat_macros.S | 39 ldr w10, [x17, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8173/include/ |
| A D | plat_macros.S | 42 ldr w10, [x17, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/include/ |
| A D | plat_macros.S | 42 ldr w10, [x27, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/include/ |
| A D | plat_macros.S | 44 ldr w10, [x17, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/include/ |
| A D | plat_macros.S | 44 ldr w10, [x17, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/xilinx/versal_net/include/ |
| A D | plat_macros.S | 71 ldr w10, [x17, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/xilinx/versal/include/ |
| A D | plat_macros.S | 69 ldr w10, [x17, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/qti/common/inc/aarch64/ |
| A D | plat_macros.S | 78 ldr w10, [x27, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/include/plat/arm/common/aarch64/ |
| A D | arm_macros.S | 69 ldr w10, [x17, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/plat/rockchip/common/include/ |
| A D | plat_macros.S | 77 ldr w10, [x27, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/include/plat/marvell/armada/common/aarch64/ |
| A D | marvell_macros.S | 78 ldr w10, [x17, #GICC_CTLR]
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| /arm-trusted-firmware-2.8.0/include/drivers/arm/ |
| A D | gicv2.h | 69 #define GICC_CTLR U(0x0) macro
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