Searched refs:HSLS_IDM_REGS_BASE (Results 1 – 2 of 2) sorted by relevance
179 #define HSLS_IDM_REGS_BASE 0x68e00000 macro329 #define DMAC_M0_IDM_RESET_CONTROL (HSLS_IDM_REGS_BASE + 0x800)361 #define PNOR_IDM_BASE (HSLS_IDM_REGS_BASE + 0xb000)381 #define NAND_IDM_IDM_RESET_CONTROL (HSLS_IDM_REGS_BASE + 0xa800)389 #define SDIO_IDM0_IO_CONTROL_DIRECT (HSLS_IDM_REGS_BASE + 0x2408)390 #define SDIO_IDM1_IO_CONTROL_DIRECT (HSLS_IDM_REGS_BASE + 0x3408)391 #define SDIO_IDM0_IDM_RESET_CONTROL (HSLS_IDM_REGS_BASE + 0x2800)402 #define ROM_S0_IDM_IO_STATUS (HSLS_IDM_REGS_BASE + 0x9500)422 #define QSPI_IDM_RESET_CONTROL (HSLS_IDM_REGS_BASE + 0xc800)424 #define APBR_IDM_RESET_CONTROL (HSLS_IDM_REGS_BASE + 0xe800)[all …]
302 #define AMAC_IDM0_IO_CONTROL_DIRECT (HSLS_IDM_REGS_BASE + 0x4408)573 #define I2S_RESET_CONTROL (HSLS_IDM_REGS_BASE + 0x1800)574 #define I2S_IDM_IO_CONTROL (HSLS_IDM_REGS_BASE + 0x1408)
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