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Searched refs:MCUCFG_MP2_PWR_RST_CTL (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/drivers/spmc/
A Dmtspmc.c293 pwr_rst_ctl = mmio_read_32(MCUCFG_MP2_PWR_RST_CTL); in spm_poweroff_cluster()
294 mmio_write_32(MCUCFG_MP2_PWR_RST_CTL, in spm_poweroff_cluster()
325 mmio_clrbits_32(MCUCFG_MP2_PWR_RST_CTL, SW_RST_B); in spm_poweron_cluster()
335 pwr_rst_ctl = mmio_read_32(MCUCFG_MP2_PWR_RST_CTL); in spm_poweron_cluster()
336 mmio_write_32(MCUCFG_MP2_PWR_RST_CTL, in spm_poweron_cluster()
A Dmtspmc_private.h172 #define MCUCFG_MP2_PWR_RST_CTL (MCUCFG_MP2_BASE + 0x8) macro

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